公开(公告)号：WO2009102741A1

公开(公告)日：2009-08-20

申请号：PCT/US2009/033723

申请日：2009-02-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  LINDGREN, Peter, J. ,  SPROGIS, Edmund, J. ,  STAMPER, Anthony, K. ,  STEIN, Kenneth, J.

Inventor： LINDGREN, Peter, J. ,  SPROGIS, Edmund, J. ,  STAMPER, Anthony, K. ,  STEIN, Kenneth, J.

IPC: H01L23/48

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A through substrate (10) via includes an annular conductor layer at a periphery of a through substrate (10) aperture, and a plug layer (24) surrounded by the annular conductor layer. A method for fabricating the through substrate (10) via includes forming a blind aperture within a substrate (10) and successively forming and subsequently planarizing within the blind aperture a conformal conductor layer (20) that does not fill the aperture and plug layer (24) that does fill the aperture. The backside of the substrate (10) may then be planarized to expose at least the planarized conformal conductor layer. (20)

Abstract translation: 贯穿基板（10）通孔包括在通孔基板（10）的周边的环形导体层和由环形导体层包围的插塞层（24）。 一种用于制造穿透基底（10）通孔的方法，包括在基底（10）内形成盲孔，并且在盲孔内依次形成并随后在盲孔内平坦化形成不填充孔径和塞子层（24）的共形导体层（20） ），其中填充了孔径。 然后可以将衬底（10）的背面平坦化以至少露出平坦化的共形导体层。 （20）

公开(公告)号：WO2009140052A3

公开(公告)日：2010-01-21

申请号：PCT/US2009041861

申请日：2009-04-28

Applicant: IBM ,  ESHUN EBENEZER E ,  HE ZHONG-XIANG ,  RASSEL ROBERT M ,  COOLBAUGH DOUGLAS ,  GEBRESELASIE EPHREM G ,  WANG PING-CHUAN ,  KIM DEOK-KEE ,  KOTHANDARAMAN CHANDRASEKHARAN ,  ROBSON NORMAN W ,  MOY DAN ,  SAFRAN JOHN M ,  STEIN KENNETH J ,  HO HERBERT L ,  YAN HONGWEN

Inventor： ESHUN EBENEZER E ,  HE ZHONG-XIANG ,  RASSEL ROBERT M ,  COOLBAUGH DOUGLAS ,  GEBRESELASIE EPHREM G ,  WANG PING-CHUAN ,  KIM DEOK-KEE ,  KOTHANDARAMAN CHANDRASEKHARAN ,  ROBSON NORMAN W ,  MOY DAN ,  SAFRAN JOHN M ,  STEIN KENNETH J ,  HO HERBERT L ,  YAN HONGWEN

IPC: H01L21/335

CPC classification number: H01L27/0629 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.

Abstract translation: 半导体结构和半导体结构的制造方法提供一种场效应器件，其位于和形成在半导体衬底的有源区上，并且至少一个熔丝结构，抗熔丝结构和电阻结构中的至少一个至少位于并形成 部分地同时地在与半导体衬底内的有源区域横向分离的隔离区域上。 场效应器件包括包括高介电常数介电材料的栅极电介质和包括金属材料的栅电极。 熔丝结构，反熔丝结构和电阻器结构中的至少一个包括包括与栅极电介质相同的材料的焊盘电介质，以及可选地还包括熔断器，反熔丝或电阻器，其可以包括与所述栅极电介质相同的金属材料 栅电极。

公开(公告)号：WO2003001584A1

公开(公告)日：2003-01-03

申请号：PCT/US2002/019789

申请日：2002-06-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  JAGANNATHAN, Basanth ,  JENG, Shwu-Jen ,  JOHNSON, Jeffrey, B. ,  JOHNSON, Robb, A. ,  LANZEROTTI, Louis, D. ,  STEIN, Kenneth, J. ,  SUBBANNA, Seshadri

Inventor： JAGANNATHAN, Basanth ,  JENG, Shwu-Jen ,  JOHNSON, Jeffrey, B. ,  JOHNSON, Robb, A. ,  LANZEROTTI, Louis, D. ,  STEIN, Kenneth, J. ,  SUBBANNA, Seshadri

IPC: H01L21/331

CPC classification number: H01L29/66242 ,  H01L21/8249 ,  H01L29/7378

Abstract: A method for making a non-self-aligned, heterojunction bipolar transistor includes forming extrinsic base regions (70) with a PFET source/drain implant aligned with the polysilicon in an emitter stack but which are not directly aligned with an emitter opening defined in that stack. This is achieved by making the emitter pedestal (66) wider than the emitter opening. This advantageously removes the dependency of alignment between the extrinsic base regions and the emitter opening, thereby resulting in fewer process steps, reduced thermal cycles, and improved speed.

Abstract translation: 一种用于制造非自对准的异质结双极晶体管的方法包括：在发射极堆叠中形成具有与多晶硅对准的PFET源极/漏极注入的非本征基极区域（70），但并不直接对准在该区域中限定的发射极开口 叠加。 这通过使发射器基座（66）比发射器开口更宽来实现。 这有利地消除了非本征基区和发射极开口之间的对准的依赖性，从而导致更少的工艺步骤，减少的热循环和改进的速度。

公开(公告)号：WO2009140052A2

公开(公告)日：2009-11-19

申请号：PCT/US2009/041861

申请日：2009-04-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  ESHUN, Ebenezer, E. ,  HE, Zhong-xiang ,  RASSEL, Robert, M. ,  COOLBAUGH, Douglas ,  GEBRESELASIE, Ephrem, G. ,  WANG, Ping-chuan ,  KIM, Deok-kee ,  KOTHANDARAMAN, Chandrasekharan ,  ROBSON, Norman, W. ,  MOY, Dan ,  SAFRAN, John, M. ,  STEIN, Kenneth, J. ,  HO, Herbert, L. ,  YAN, Hongwen

Inventor： ESHUN, Ebenezer, E. ,  HE, Zhong-xiang ,  RASSEL, Robert, M. ,  COOLBAUGH, Douglas ,  GEBRESELASIE, Ephrem, G. ,  WANG, Ping-chuan ,  KIM, Deok-kee ,  KOTHANDARAMAN, Chandrasekharan ,  ROBSON, Norman, W. ,  MOY, Dan ,  SAFRAN, John, M. ,  STEIN, Kenneth, J. ,  HO, Herbert, L. ,  YAN, Hongwen

IPC: H01L27/06 ,  H01L21/8234

CPC classification number: H01L27/0629 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.

Abstract translation: 半导体结构和半导体结构的制造方法提供一种场效应器件，其位于和形成在半导体衬底的有源区上，并且至少一个熔丝结构，抗熔丝结构和电阻结构中的至少一个至少位于并形成 部分地同时地在与半导体衬底内的有源区域横向分离的隔离区域上。 场效应器件包括包括高介电常数介电材料的栅极电介质和包括金属材料的栅电极。 熔丝结构，反熔丝结构和电阻器结构中的至少一个包括包括与栅极电介质相同的材料的焊盘电介质，以及可选地还包括熔断器，反熔丝或电阻器，其可以包括与所述栅极电介质相同的金属材料 栅电极。