DATA CORRECTING HIERARCHICAL INTEGRATED CIRCUIT LAYOUT ACCOMMODATING COMPENSATE FOR LONG RANGE CRITICAL DIMENSION VARIATION

    公开(公告)号:WO2009131827A3

    公开(公告)日:2009-10-29

    申请号:PCT/US2009/039703

    申请日:2009-04-07

    Abstract: A solution for performing a data correction on a hierarchical integrated circuit layout is provided. A method includes: receiving a CD compensation map for the long range critical dimension variation prior to the data correction; grouping compensation amounts of the CD compensation into multiple compensation ranges; generating multiple target layers corresponding to the multiple compensation ranges; super-imposing a region of the CD compensation map having a compensation amount falling into a compensation range over a respective target layer to generate a target shape; performing the data correction on the layout to generate a data corrected layout; performing the data correction on the target shape separately to generate a data corrected target shape; and combining the data corrected layout and the data corrected target shape based on the CD compensation map.

    DATA CORRECTING HIERARCHICAL INTEGRATED CIRCUIT LAYOUT ACCOMMODATING COMPENSATE FOR LONG RANGE CRITICAL DIMENSION VARIATION
    2.
    发明申请
    DATA CORRECTING HIERARCHICAL INTEGRATED CIRCUIT LAYOUT ACCOMMODATING COMPENSATE FOR LONG RANGE CRITICAL DIMENSION VARIATION 审中-公开
    数据校正分层整合电路布局扩展补偿长期关键尺寸变化

    公开(公告)号:WO2009131827A2

    公开(公告)日:2009-10-29

    申请号:PCT/US2009039703

    申请日:2009-04-07

    CPC classification number: G06F17/5081 G03F1/36

    Abstract: A solution for performing a data correction on a hierarchical integrated circuit layout is provided. A method includes: receiving a CD compensation map for the long range critical dimension variation prior to the data correction; grouping compensation amounts of the CD compensation into multiple compensation ranges; generating multiple target layers corresponding to the multiple compensation ranges; super-imposing a region of the CD compensation map having a compensation amount falling into a compensation range over a respective target layer to generate a target shape; performing the data correction on the layout to generate a data corrected layout; performing the data correction on the target shape separately to generate a data corrected target shape; and combining the data corrected layout and the data corrected target shape based on the CD compensation map.

    Abstract translation: 提供了一种用于在分层集成电路布局上执行数据校正的解决方案。 一种方法包括:在数据校正之前接收用于长距离临界尺寸变化的CD补偿图; 将CD补偿的补偿量分组为多个补偿范围; 产生对应于多个补偿范围的多个目标层; 超级CD补偿图的区域具有落在相应目标层上的补偿范围内的补偿量以产生目标形状; 在布局上执行数据校正以生成数据校正布局; 分别对目标形状进行数据校正,生成数据校正对象的形状; 并且基于CD补偿图组合数据校正布局和数据校正目标形状。

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