公开(公告)号：KR101344754B1

公开(公告)日：2013-12-24

申请号：KR1020130027999

申请日：2013-03-15

Applicant: 국민대학교산학협력단

Inventor： 배학열 ,  최현준 ,  김대환 ,  김동명

IPC: H01L21/66 ,  H01L29/786 ,  G02F1/136

CPC classification number: H01L22/12 ,  H01L22/30 ,  H01L29/78693

Abstract: A method for extracting the density of state within an intrinsic band gap of an amorphous oxide semiconductor thin film transistor and a device thereof are disclosed. The method for extracting the density of state within the intrinsic band gap of the amorphous oxide semiconductor thin film transistor according to the present invention comprises; a step of measuring darkroom capacitance according to gate voltage of a thin film transistor; a step of measuring light reaction capacitance of the thin film transistor by irradiating the thin film transistor with a light source of a predetermined wavelength; a step of applying a first capacitance model and a second capacitance model to an area under flat-band voltage of the thin film transistor and an area over the flat-band voltage of the thin film transistor; and a step of extracting the density of state of an acceptor within the band gap and the density of state of a donor within the band gap based on the darkroom capacitance, the light reaction capacitance, and the applied first and second capacitance models. The present invention extracts the whole density of state within the band gap using experimental measurement data and rapidly simply extracts the whole density of state within the band gap by omitting a repetitive process and a complex calculation. [Reference numerals] (AA) START;(BB) END;(S210) Darkroom capacitance according to gate voltage is measured in a darkroom;(S220) Light reaction capacitance according to gate voltage is measured by irradiating a light source;(S230) Different capacitance model is applied to an area under or over flat voltage (V_FB);(S240) Density of state of a donor within a band gap and the density of state of anacceptor within the band gap are separately extracted based on measured darkroom capacitance, light reaction capacitance, and a capacitance model

Abstract translation: 公开了一种用于提取非晶氧化物半导体薄膜晶体管的固有带隙内的状态密度的方法及其装置。 根据本发明的提取非晶氧化物半导体薄膜晶体管的本征带隙内的状态密度的方法包括： 根据薄膜晶体管的栅极电压测量暗室电容的步骤; 通过用预定波长的光源照射薄膜晶体管来测量薄膜晶体管的光反应电容的步骤; 将第一电容模型和第二电容模型应用于薄膜晶体管的平带电压下的区域和薄膜晶体管的平坦带电压上的面积的步骤; 以及基于暗室电容，光反应电容和所施加的第一和第二电容模型，提取带隙内的受体的状态密度和施加体在带隙内的状态密度的步骤。 本发明使用实验测量数据提取带隙内的整体状态密度，并且通过省略重复处理和复杂计算，快速简单地提取带隙内的整体状态密度。 （参考号）（AA）START;（BB）END;（S210）根据栅极电压的暗室电容在暗室中测量;（S220）通过照射光源测量根据栅极电压的光反应电容;（S230） 不同的电容模型应用于平坦电压（V_FB）以下的区域;（S240）基于测量的暗室电容，单独提取在带隙内的供体的状态密度和带隙内的受体的状态密度， 光反应电容和电容模型

公开(公告)号：KR101531667B1

公开(公告)日：2015-06-26

申请号：KR1020140066080

申请日：2014-05-30

Applicant: 국민대학교산학협력단

Inventor： 김동명 ,  김대환 ,  안제엽 ,  배학열 ,  최현준 ,  황준석

IPC: H01L21/66 ,  H01L29/786

CPC classification number: H01L22/14 ,  H01L22/12 ,  H01L29/78672

Abstract: 본발명은다결정박막트랜지스터에서결정립계가존재하지않는경우의게이트-드레인, 게이트-소스의커패시턴스-전압특성과결정립계가존재하는경우의게이트-드레인, 게이트-소스의커패시턴스-전압특성의차를이용하여결정립계의위치에의존하는커패시턴스의변화()를추출하고최종적으로는결정립계의위치를계산을통해추출하는장치및 방법을제공하기위한것으로서, 결정립계가소자의채널내에존재하지않는경우의커패시턴스-전압특성및 결정립계가소자의채널내에존재하는경우의커패시턴스-전압특성을각각검출하는커패시턴스-전압특성검출모듈과, 상기커패시턴스-전압특성검출모듈에서검출된각각의커패시턴스-전압특성을서로비교하고그 결과의차를이용하여커패시턴스의변화()를추출하는커패시턴스변화추출부와, 상기커패시턴스변화추출부에서추출된커패시턴스의변화를이용하여소자의채널내 결정립계의위치를산출하는결정립경계위치산출부를포함하여구성되는데있다.

Abstract translation: 本发明是提供一种装置和方法，其通过使用栅极 - 漏极和栅极 - 源极的电容 - 电压特性的差异来提取取决于晶粒位置的电容的变化，当晶粒不是 存在于多晶硅薄膜晶体管中，并且当存在晶粒时使用栅极 - 漏极和栅极 - 源极的电容 - 电压特性的差异，并且最终通过计算提取晶粒的位置。 该装置包括：电容电压特性检测模块，用于当晶体存在于器件的沟道内时分别检测电容 - 电压特性;以及当晶粒不存在于器件的沟道中时的电容 - 电压特性; 电容变化提取单元，通过使用电容电压特性检测模块分别检测出的电容电压特性之差通过比较电容电压特性来提取电容的变化（C_gb.X_GB）; 以及晶界边界位置计算单元，通过使用由电容变化提取单元提取的电容的变化来计算器件的沟道内的晶粒的位置。

公开(公告)号：KR101427713B1

公开(公告)日：2014-08-07

申请号：KR1020130112514

申请日：2013-09-23

Applicant: 국민대학교산학협력단

Inventor： 김동명 ,  김대환 ,  최현준 ,  배학열 ,  황준석 ,  안제엽

IPC: H01L21/66 ,  H01L29/786

CPC classification number: H01L22/12 ,  H01L22/30 ,  H01L29/78693

Abstract: A method for extracting intrinsic subgap density of states of an amorphous oxide semiconductor thin film transistor using a channel conduction factor, and a device thereof are disclosed. The method for extracting the intrinsic subgap density of states of the amorphous oxide semiconductor thin film transistor according to an embodiment of the present invention comprises a step of measuring capacitance according to a gate voltage of the thin film transistor; a step of extracting a conduction factor of a channel according to the gate voltage using the measured capacitance; and a step of extracting intrinsic subgap density of states based on the conduction factor of the extracted channel. The step of extracting the intrinsic subgap density of states replaces a physical length between source and drain electrodes with a length of a variable of the conduction factor of the channel and extracts the intrinsic subgap density of states considering the conduction factor of the channel.

Abstract translation: 公开了一种使用沟道导通因数提取非晶氧化物半导体薄膜晶体管的本征子陷阱密度的方法及其装置。 根据本发明实施例的用于提取非晶氧化物半导体薄膜晶体管的本征子陷阱密度的方法包括根据薄膜晶体管的栅极电压测量电容的步骤; 使用测量的电容根据栅极电压提取沟道的导通因数的步骤; 以及基于提取的通道的导通因数来提取状态的内在子陷阱密度的步骤。 提取状态的固有子间隙密度的步骤取代了源极和漏极之间的物理长度，其长度为通道的导通因子的变量的长度，并且考虑通道的导通因数提取状态的内在子陷阱密度。

公开(公告)号：KR101344752B1

公开(公告)日：2013-12-24

申请号：KR1020130027986

申请日：2013-03-15

Applicant: 국민대학교산학협력단

Inventor： 최현준 ,  배학열 ,  김대환 ,  김동명

IPC: H01L21/66 ,  H01L29/786

CPC classification number: H01L22/12 ,  H01L22/30 ,  H01L29/78693

Abstract: A method for extracting the density of state within an intrinsic band gap of an amorphous oxide semiconductor thin film transistor and a device thereof are disclosed. The method for extracting the density of state within the intrinsic band gap of the amorphous oxide semiconductor thin film transistor comprises; a step of measuring darkroom capacitance according to gate voltage of a thin film transistor; a step of measuring light reaction capacitance of the thin film transistor by irradiating the thin film transistor with a light source of a predetermined wavelength; a step of calculating intrinsic capacitance of the thin film transistor based on the darkroom capacitance and the light reaction capacitance; and a step of extracting the density of state within the intrinsic band gap of the thin film transistor based on the calculated intrinsic capacitance. The step of calculating the intrinsic capacitance extracts the density of state within an independent intrinsic band gap to parasitic capacitance by calculating the intrinsic capacitance after de-embedding the parasitic capacitance of the thin film transistor at the darkroom capacitance and the light reaction capacitance. [Reference numerals] (AA) Start;(BB) End;(S310) Darkroom capacitance according to gate voltage is measured in a darkroom;(S320) Light reaction capacitance according to gate voltage is measured by irradiating a light source;(S330) Intrinsic capacitance is calcualted based on measured darkroom capacitance and light reaction capacitance;(S340) Density of state within a intrinsic band gap is extracted based on calculated intrinsic capacitance

Abstract translation: 公开了一种用于提取非晶氧化物半导体薄膜晶体管的固有带隙内的状态密度的方法及其装置。 提取非晶氧化物半导体薄膜晶体管的本征带隙内的状态密度的方法包括： 根据薄膜晶体管的栅极电压测量暗室电容的步骤; 通过用预定波长的光源照射薄膜晶体管来测量薄膜晶体管的光反应电容的步骤; 基于暗室电容和光反应电容计算薄膜晶体管的本征电容的步骤; 以及基于所计算的本征电容提取薄膜晶体管的本征带隙内的状态密度的步骤。 计算本征电容的步骤通过计算在薄膜晶体管的寄生电容在暗室电容和光反应电容中去嵌入之后计算固有电容，将独立的固有带隙内的状态密度提取到寄生电容。 （参考号）（AA）开始;（BB）结束;（S310）根据栅极电压的暗室电容在暗室中测量;（S320）通过照射光源测量根据栅极电压的光反应电容;（S330） 基于测量的暗室电容和光反应电容计算本征电容;（S340）根据计算出的本征电容提取本征带隙内的状态密度