公开(公告)号：KR1020110093611A

公开(公告)日：2011-08-18

申请号：KR1020110002503

申请日：2011-01-11

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 니와다까후미 ,  나까무라히로시 ,  교오다히데하루

IPC: H01L21/027

CPC classification number: H01L21/0273 ,  G03F7/0035 ,  H01L21/67178 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  G03F1/60 ,  H01L21/0274 ,  H01L2924/00

Abstract: PURPOSE: A method for processing a substrate is provided to reduce the deviation of the line width of a resist pattern by performing double patterning by LLE(Lithography Lithography Etching). CONSTITUTION: The line width of a second resist pattern, which is formed on one substrate, is measured. The first processing requirement of a first processing is corrected based on the measured value of the line width in the second resist pattern(S24). The line width of the first resist pattern, which is formed in the one substrate, is measured. The second processing requirement of a second processing is corrected based on the measured value of the line width in a first resist pattern(S28).

Abstract translation: 目的：提供一种处理基板的方法，通过LLE（平版印刷光刻蚀刻）进行双重图案化来减少抗蚀剂图案的线宽的偏差。 构成：测量形成在一个基板上的第二抗蚀剂图案的线宽。 基于第二抗蚀剂图案中的线宽度的测量值来校正第一处理的第一处理要求（S24）。 测量在一个衬底中形成的第一抗蚀剂图案的线宽度。 基于第一抗蚀剂图案中的线宽度的测量值来校正第二处理的第二处理要求（S28）。