게이트 구동 장치 및 이를 갖는 인버터
    1.
    发明公开
    게이트 구동 장치 및 이를 갖는 인버터 审中-实审
    门驱动装置和具有它的逆变器

    公开(公告)号:KR1020150145001A

    公开(公告)日:2015-12-29

    申请号:KR1020140074180

    申请日:2014-06-18

    Abstract: 본발명은게이트구동장치및 이를갖는인버터에관한것으로, 본발명의일 구현예에따른상기게이트구동장치는, 하이사이드(High Side) 스위치및 로우사이드(Low Side) 스위치를각각구비하는복수의인버터암(Arm), 상기복수의인버터암(arm)의스위칭제어를지시하는지시신호를획득하여하이사이드제어신호및 상기로우사이드스위치를제어하는스위칭신호를출력하는다채널게이트구동기및 상기하이사이드제어신호에응답하여상기하이사이드스위치를제어하는하이사이드스위칭신호를출력하는복수의게이트구동기를구비하는게이트구동부및 상기다채널게이트구동기및 상기복수의게이트구동기사이의전압균형을유지하는밸런싱부를포함한다.

    Abstract translation: 门驱动装置及其逆变器技术领域本发明涉及栅极驱动装置及具有该栅极驱动装置的反相器。 根据本发明的实施例的门驱动装置可以包括:分别具有高侧开关和低侧开关的多个逆变器臂; 通过获取指示多个逆变器臂的切换控制的指示信号,输出控制低侧开关和高侧控制信号的开关信号的多通道门驱动单元; 栅极驱动单元,具有多个栅极驱动单元,其响应于高侧控制信号输出控制高侧开关的高侧开关信号; 以及在多通道栅极驱动单元和多个栅极驱动单元之间维持电压平衡的平衡单元。

    역률 개선 회로 및 역률 개선 제어 방법
    2.
    发明公开
    역률 개선 회로 및 역률 개선 제어 방법 有权
    用于功率因数校正的电路和用于控制功率因数校正的方法

    公开(公告)号:KR1020140055126A

    公开(公告)日:2014-05-09

    申请号:KR1020120121505

    申请日:2012-10-30

    Abstract: A power factor correction circuit according to one aspect of the present invention comprises a boost converter circuit which connects a plurality of boost circuits including an inductor for boost, a rectifier diode, and a switch for boost; and a snubber circuit including an inductor for a snubber and a switch for a snubber to snubbing the boost converter circuit. The inductor for a snubber is controlled to be turned on before the inductor for boost is turned on and to provide zero-voltage to the inductor for boost. A switching loss generated when the switch for boost is turned on is reduced and the efficiency of a AC-DC power supply device is increased.

    Abstract translation: 根据本发明的一个方面的功率因数校正电路包括升压转换器电路,其连接包括用于升压的电感器,整流二极管和用于升压的开关的多个升压电路; 以及包括用于缓冲器的电感器和用于缓冲器的开关以缓冲升压转换器电路的缓冲电路。 用于缓冲器的电感器被控制为在导通电感器导通之前导通,并向电感器提供零电压用于升压。 当升压开关导通时产生的开关损耗降低,AC-DC电源装置的效率提高。

    적층형 인덕터
    3.
    发明授权
    적층형 인덕터 有权
    层压电感器

    公开(公告)号:KR100843422B1

    公开(公告)日:2008-07-03

    申请号:KR1020070060700

    申请日:2007-06-20

    Abstract: A laminated inductor is provided to minimize magnetic flux leaked to the outside by improving the DC bias characteristic. A laminated inductor includes a body formed by stacking a plurality of magnetic layers(11a,11b,11d,11f,11g). A coil unit has a plurality of conductive patterns(12a-12e) and a plurality of conductive vias. First and second external electrodes are formed on an external side surface of the body and are connected to both ends of the coil unit respectively. At least one electric insulating non-magnetic layer(13a,13b) is formed between the plurality of magnetic layers. The non-magnetic layers have external magnetic materials(11c,11e) and inner magnetic materials(11c',11e'). The external magnetic materials are formed on a surface where the first and second external electrodes are formed among an external side surface of the body to expose the non-magnetic material to the outside. The inner magnetic materials are formed on the inside of the coil unit.

    Abstract translation: 提供层叠电感器以通过改善DC偏置特性来最小化泄漏到外部的磁通量。 层叠电感器包括通过层叠多个磁性层(11a,11b,11d,11f,11g)而形成的主体。 线圈单元具有多个导电图案(12a-12e)和多个导电通孔。 第一外部电极和第二外部电极形成在主体的外侧表面上,并且分别连接到线圈单元的两端。 在多个磁性层之间形成至少一个电绝缘非磁性层(13a,13b)。 非磁性层具有外部磁性材料(11c,11e)和内部磁性材料(11c',11e')。 外部磁性材料形成在主体的外侧表面上形成第一和第二外部电极的表面上,以将非磁性材料暴露于外部。 内部磁性材料形成在线圈单元的内部。

    다연 노이즈저감 필터
    4.
    发明公开
    다연 노이즈저감 필터 无效
    多声道滤波器

    公开(公告)号:KR1020030037746A

    公开(公告)日:2003-05-16

    申请号:KR1020010068602

    申请日:2001-11-05

    Abstract: PURPOSE: A multi-noise filter is provided to prevent crosstalk due to mutual inductance by arranging an earth electrode between inductance portions. CONSTITUTION: A multi-noise filter is formed with two noise reduction filters. The multi-noise filter is formed by installing the first and the second noise reduction filters(20a,20b) inside of a single chip(21). Each of the first and the second noise reduction filters(20a,20b) has a π-shaped structure including an earth electrode(22), an inductance portion(27a,27b), and the first and the second capacitance portions(24a,25a,24b,25b). The earth electrode(22) is arranged at a center of the multi-noise filter. The earth electrode(22) is formed with an earth portion. An inductance portion(27a,27b) is formed with coil-shaped conductive patterns.

    Abstract translation: 目的:提供多噪声滤波器,通过在电感部分之间布置接地电极来防止由于互感引起的串扰。 构成:使用两个降噪滤波器形成多噪声滤波器。 多噪声滤波器通过将第一和第二降噪滤波器(20a,20b)安装在单个芯片(21)内而形成。 第一和第二降噪滤光器(20a,20b)中的每一个具有包括接地电极(22),电感部分(27a,27b)和第一和第二电容部分(24a,25a)的π形结构 ,24B,25B)。 接地电极(22)布置在多噪声滤波器的中心。 接地电极(22)形成有接地部分。 电感部分(27a,27b)形成有线圈状导电图案。

    인버터 보호 장치
    5.
    发明公开
    인버터 보호 장치 审中-实审
    逆变器保护装置

    公开(公告)号:KR1020140080017A

    公开(公告)日:2014-06-30

    申请号:KR1020120149346

    申请日:2012-12-20

    Inventor: 박민규

    CPC classification number: H02M1/32 H02M1/44 H02M2001/0009

    Abstract: The present invention relates to an inverter protection device which includes a reference voltage obtaining unit which obtains a reference voltage signal based on the output current of an inverter module, a filtering unit which outputs a filtering signal by removing the noise of the reference voltage signal, a sensing unit which senses the filtering signal via a sensing terminal, an electrostatic discharge diode which is formed between the sensing terminal and a ground, and a bypass unit which is formed between the ground and one end of the electrostatic discharge diode.

    Abstract translation: 本发明涉及一种逆变器保护装置,其包括:基准电压获取单元,其基于逆变器模块的输出电流获得参考电压信号;滤波单元,其通过去除参考电压信号的噪声来输出滤波信号; 感测单元,其通过感测端子感测滤波信号;形成在感测端子和地之间的静电放电二极管;以及形成在静电放电二极管的接地端和一端之间的旁路单元。

    역률 보정 회로, 이를 갖는 전원 장치 및 모터 구동 장치
    7.
    发明公开
    역률 보정 회로, 이를 갖는 전원 장치 및 모터 구동 장치 失效
    功率因数校正电路,其电源及电机驱动器

    公开(公告)号:KR1020130030001A

    公开(公告)日:2013-03-26

    申请号:KR1020110093472

    申请日:2011-09-16

    Abstract: PURPOSE: A power factor correcting circuit, a power supply device including the same, and a motor driving device are provided to reduce a switching loss in a power factor switching process by transmitting residual power to a ground before a switching process for correcting a power factor. CONSTITUTION: A main switch(S1) controls a phase difference between a current and a voltage of input power by switching the input power. A sub switch(S2) is switched on before the main switch is switched on. The sub switch forms a transmission path for the residual power of the main switch. [Reference numerals] (110) Control unit

    Abstract translation: 目的:提供功率因数校正电路,包括该功率因数校正电路的电源装置和电动机驱动装置,以在用于校正功率因数的切换处理之前通过向地面发送剩余功率来减小功率因数切换过程中的开关损耗 。 构成:主开关(S1)通过切换输入功率来控制输入功率的电流和电压之间的相位差。 在主开关接通之前,子开关(S2)接通。 副开关形成用于主开关的剩余电力的传输路径。 (附图标记)(110)控制单元

    적층형 칩 커패시터
    8.
    发明公开
    적층형 칩 커패시터 失效
    多层芯片电容器

    公开(公告)号:KR1020080063680A

    公开(公告)日:2008-07-07

    申请号:KR1020070000353

    申请日:2007-01-02

    Inventor: 박민규

    Abstract: A multilayer chip capacitor is provided to reduce power loss by decreasing ESR(Equivalent Series Resistance) through frequency attenuation characteristic and a resonance frequency characteristic. A multilayer chip capacitor(100) includes a main body(101), a plurality of first and second inner electrodes(103a,104a), and first and second outer electrodes(103,104). The main body is formed by stacking a plurality of dielectric layers(103b,104b) and has first and fourth sides(S1-S4) in parallel with a stacking direction. The first and second sides face each other and the third and fourth sides face each other. The first and second inner electrodes are alternately stacked by being separated by the dielectric layers in the main body. The first and second outer electrodes are formed on the first and second sides respectively and have different polarity.

    Abstract translation: 提供多层片式电容器,通过频率衰减特性和谐振频率特性降低ESR(等效串联电阻)来降低功率损耗。 多层片状电容器(100)包括主体(101),多个第一和第二内部电极(103a,104a)以及第一和第二外部电极(103,104)。 主体通过层叠多个电介质层(103b,104b)形成,并且具有与堆叠方向平行的第一和第四侧(S1-S4)。 第一和第二面彼此面对,第三和第四面彼此面对。 第一和第二内部电极通过主体中的电介质层分离而交替堆叠。 第一和第二外部电极分别形成在第一和第二侧上并且具有不同的极性。

    역률 보상 장치
    9.
    发明授权
    역률 보상 장치 有权
    功率因数校正装置

    公开(公告)号:KR101462733B1

    公开(公告)日:2014-11-17

    申请号:KR1020120140170

    申请日:2012-12-05

    Abstract: 본 발명은 소정의 위상차를 가지고 스위칭 동작하는 제1 메인 스위치 및 제2 메인 스위치를 구비한 메인 스위치부, 상기 제1 메인 스위치 및 상기 제2 메인 스위치의 온 동작 전에 각각 존재하는 잉여 전원의 전달 경로를 각각 형성하는 제1 보조 스위치 및 제2 보조 스위치를 구비한 보조 스위치부, 교류 전원이 인가되는 전원 입력부와 상기 메인 스위치부 사이에 위치하고 상기 메인 스위치부의 스위칭에 따라 에너지를 축적 또는 방출하는 인덕터부, 상기 보조 스위치부의 스위칭 동작시 상기 보조 스위치부에 흐르는 전류량을 조절하는 보조 인덕터부를 포함하는 역률 보상 장치에 관한 것이다.

    역률 보정 회로, 이를 갖는 전원 장치 및 모터 구동 장치
    10.
    发明公开
    역률 보정 회로, 이를 갖는 전원 장치 및 모터 구동 장치 无效
    功率因数校正电路,其电源及电机驱动器

    公开(公告)号:KR1020130048757A

    公开(公告)日:2013-05-10

    申请号:KR1020130045931

    申请日:2013-04-25

    Abstract: PURPOSE: A power factor correcting circuit including a sub switch, a power device including the same, and a motor operating device are provided to reduce switching loss generated during power factor correction switching by delivering residual power to ground connection. CONSTITUTION: A main switch(S1) controls a phase difference between a current and a voltage of input power by switching input power. A sub switch(S2) forms a delivery route of residual power of the main switch. A first inductor(L1) is connected with an input power terminal and the main switch to discharge or accumulate energy according to the switching of the main switch. A second inductor(L2) controls the amount of currents in the sub switch. A control unit(110) supplies switching control signals(G1,G2) for controlling the main switch and the sub switch. [Reference numerals] (110) Control unit

    Abstract translation: 目的:提供一种功率因数校正电路,其包括副开关,包括该开关的功率器件和电动机操作装置,以通过将剩余电力输送到接地连接来减少在功率因数校正切换期间产生的开关损耗。 构成:主开关(S1)通过切换输入功率来控制输入功率的电流和电压之间的相位差。 副开关(S2)形成主开关的剩余电力的输送路径。 第一电感器(L1)与输入电源端子和主开关连接,根据主开关的切换放电或累积能量。 第二电感(L2)控制子开关中的电流量。 控制单元(110)提供用于控制主开关和副开关的开关控制信号(G1,G2)。 (附图标记)(110)控制单元

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