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公开(公告)号：KR1020100008849A
公开(公告)日：2010-01-27
申请号：KR1020080069442
申请日：2008-07-17
Applicant: 삼성전자주식회사
Inventor： 곽창현
CPC classification number: H03M13/091 , H03M13/2739 , H03M13/2942 , H03M13/2966 , H03M13/3972
Abstract: PURPOSE: A method and a device for checking cyclic redundancy in a communication system are provided to reduce a delay time due to CRC coding and decoding by dividing an input signal into N segments. CONSTITUTION: The power of x is multiplied with each sub message(501,503,505,507). The CRC decoding is performed by adding 0 to the multiplied result(511,513,515). The generated CRC is added to a GF adder. The same result as the CRC about the information message to be transmitted is obtained. The transmission information message is separated into M sub messages. Each CRC of the separated sub messages is obtained. The CRC of the information message to be transmitted is obtained by adding the CRC.
Abstract translation: 目的：提供一种用于检查通信系统中的循环冗余的方法和装置，以通过将输入信号划分为N个段来减少由CRC编码和解码引起的延迟时间。 构成：x的幂与每个子信息相乘（501,503,505,507）。 通过将0加到乘法结果（511,513,515）来执行CRC解码。 生成的CRC被添加到GF加法器。 获得与要发送的信息消息相关的CRC相同的结果。 传输信息消息被分成M个子消息。 获得分离的子消息的每个CRC。 通过添加CRC来获得要发送的信息消息的CRC。
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Patent Agency Ranking
公开(公告)号：KR1020070049094A
公开(公告)日：2007-05-10
申请号：KR1020060109694
申请日：2006-11-07
Applicant: 삼성전자주식회사
CPC classification number: H03M13/29 , H03M13/09 , H03M13/2975
Abstract: 본 발명은 이동통신 시스템에서 채널 복호기에서 반복 복호 정지 장치 및 방법에 관한 것으로, 특히 터보 부호의 반복 복호에 있어 HDA(hard-decision aided)법을 사용함에 있어서, CRC(cyclic redundancy check) 부호화를 통하여 HDA기법에 필요한 메모리를 최소화 할 수 있는 장치 및 방법에 관한 것이다.
본 발명의 실시 예에 따른 방법은 이동통신 시스템에서 반복 복호 정지 방법에 있어서, 수신된 신호를 요소 복호화하여 출력하는 과정과, 상기 요소 복호화된 신호를 경판정하여 출력하는 과정과, 상기 경판정된 신호를 CRC(cyclic redundancy check) 부호화하여 패리티를 출력하는 과정과, 상기 CRC 부호화된 패리티의 동일 여부를 판단하고, 동일 여부에 따라 반복 복호 정지를 결정하는 과정을 포함함을 특징으로 한다.
반복 복호, 경판정, CRC(cyclic redundancy check)-
公开(公告)号：KR1020090020186A
公开(公告)日：2009-02-26
申请号：KR1020070084725
申请日：2007-08-23
Applicant: 삼성전자주식회사
CPC classification number: H04L1/0045 , H04L1/0067 , H04L1/0071
Abstract: An apparatus and a method for rate dematching in communication system are provided to reduce the delay time to start data rate flow by completing the deinterleaving. The current data inputted in the deinterleaved order, the arrival sequence generator calculates the number of order of data. The error calculator calculates the error by using the arrival sequence and previous error. Hole/repetition decision devices(801,805) determine the kind of current data by using the result previously determined with the error. An output unit processes the current data according to the kinds of data and outputs the result.
Abstract translation: 提供通信系统中的速率分配的装置和方法，以通过完成解交织来减少启动数据速率流的延迟时间。 以解交织的顺序输入的当前数据，到达序列生成器计算数据的次数。 错误计算器通过使用到达序列和以前的错误计算错误。 孔/重复判定装置（801,805）通过使用先前用误差确定的结果来确定当前数据的种类。 输出单元根据数据种类处理当前数据并输出结果。
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公开(公告)号：KR101392446B1
公开(公告)日：2014-05-07
申请号：KR1020070084725
申请日：2007-08-23
Applicant: 삼성전자주식회사
CPC classification number: H04L1/0045 , H04L1/0067 , H04L1/0071
Abstract: 본발명은통신시스템에서데이터전송율역정합방법및 장치에관한것으로서, 인터리빙된순서로입력되는현재데이터가디인터리빙되어원래순서대로입력되었을경우, 상기원래의순서에서몇 번째에해당하는데이터인지를계산하는입력순서생성기와, 상기입력순서와이전에러를이용하여현재에러를계산하는에러계산기와, 상기현재에러와이전에판단된결과를이용하여상기현재데이터의종류를판단하는천공/반복판단기와, 상기현재데이터의종류에따라데이터를처리하여출력하는출력기를포함하여, 데이터의입력순서를통해에러를계산하여디인터리빙(deinterleaving)이완료되기전에데이터전송율역정합을수행함으로써, 상기데이터전송율역정합을시작하는데걸리는지연시간을감소시킬수 있다.
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公开(公告)号：KR100876735B1
公开(公告)日：2008-12-31
申请号：KR1020060109694
申请日：2006-11-07
Applicant: 삼성전자주식회사
CPC classification number: H03M13/29 , H03M13/09 , H03M13/2975
Abstract: An apparatus and method are provided for stopping iterative decoding in a channel decoder of a mobile communication system. Constituent decoding of received signals is performed and decoded signals are output. Hard decision processes for the decoded signals are performed and hard-decided signals are output. The hard-decided signals are cyclic redundancy check (CRC) encoded, and a determination is made as to whether the parities are identical and iterative decoding is stopped according to a determination result.
Abstract translation: 提供了用于在移动通信系统的信道解码器中停止迭代解码的设备和方法。 接收信号的组成解码被执行并且解码信号被输出。 对解码后的信号进行硬判决处理，输出硬判决信号。 硬判决信号是循环冗余校验（CRC）编码，并且根据确定结果确定奇偶校验是否相同并且停止迭代解码。
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6.发明公开고속 패킷 데이터 시스템에서 싱글 포트 메모리를 이용하는복합 자동 재전송 요구 장치와 그 메모리 할당 방법 无效在高数据速率无线通信系统中使用单端口存储器的混合自动重复请求装置及其存储器分配方法
公开(公告)号：KR1020070065525A
公开(公告)日：2007-06-25
申请号：KR1020050126064
申请日：2005-12-20
Applicant: 삼성전자주식회사
Abstract: A hybrid automatic repeat request apparatus using a single port memory in a high data-rate wireless communication system and a memory allocation method thereof are provided to improve a data process rate by reducing process speed lowering caused by a memory clear time. A hybrid automatic repeat request apparatus using a single port memory in a high data-rate wireless communication system includes a plurality of memory banks(310-340), an H-ARQ controller(350), a plurality of registers(301-303), a demultiplexer(360), and a multiplexer(370). The plurality of memory banks(310-340) operates as a buffer for storing H-ARQ bursts which consist of information data(Systematic A,B) and a parity data(Parity Y,W). The H-ARQ controller(350) generally controls the apparatus according to dynamic memory allocation algorithm. The plurality of registers(301-303) stores information for a dynamic memory allocation. The demultiplexer(360) demultiplexes the H-ARG burst inputted for each ACQ channel. The multiplexer(370) multiplexes H-ARQ processed data and outputs the H-ARQ processed data to a decoder.
Abstract translation: 提供了一种使用高数据速率无线通信系统中的单端口存储器的混合自动重传请求装置及其存储器分配方法，以通过降低由存储器清除时间引起的处理速度降低来提高数据处理速率。 在高数据速率无线通信系统中使用单端口存储器的混合自动重传请求装置包括多个存储器组（310-340），H-ARQ控制器（350），多个寄存器（301-303） ，解复用器（360）和多路复用器（370）。 多个存储体（310-340）作为用于存储由信息数据（系统A，B）和奇偶校验数据（奇偶校验Y，W）组成的H-ARQ脉冲串的缓冲器。 H-ARQ控制器（350）通常根据动态存储器分配算法控制装置。 多个寄存器（301-303）存储用于动态存储器分配的信息。 解复用器（360）对针对每个ACQ信道输入的H-ARG突发进行解复用。 多路复用器（370）复用H-ARQ处理的数据并将H-ARQ处理的数据输出到解码器。
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