公开(公告)号：KR100656486B1

公开(公告)日：2006-12-11

申请号：KR1020060002351

申请日：2006-01-09

Applicant: 삼성전자주식회사

Inventor： 임혜숙 ,  김혜란 ,  문주형 ,  권대형 ,  김선기 ,  문강영

IPC: H04W36/02 ,  H04W80/04

公开(公告)号：KR100656479B1

公开(公告)日：2006-12-11

申请号：KR1020060002349

申请日：2006-01-09

Applicant: 삼성전자주식회사

Inventor： 임혜숙 ,  김혜란 ,  문주형 ,  김원정 ,  지서영 ,  추하늘 ,  권대형 ,  문강영 ,  김선기

IPC: H04W80/04

Abstract: An apparatus for providing mobile IPv6 is provided to quickly sense when a mobile node moves to a new link, transmit packets necessary for binding, and quickly process a response packet by realizing hardware for providing the mobile IPv 6, thereby efficiently supporting mobility. An apparatus(300) for providing mobile IPv6 comprises the followings: a mobile reception processor(323) which outputs home addresses of a mobile node and correspondent node and header information related to mobility according to whether a received packet is a binding packet or a data packet; a binding cache(302) and a binding update storage(303) for storing binding information that the mobile node has received and transmitted; and a binding receiver(325) which receives a binding message generated by the correspondent node, receives home address information of the mobile node and correspondent node from the mobile reception processor(323) and provides information about the binding message to the bonding cache(302) and binding update storage(303).

Abstract translation: 提供一种用于提供移动IPv6的装置，以快速感测移动节点何时移动到新链路，传送绑定所需的分组，并且通过实现用于提供移动IPv6的硬件来快速处理响应分组，从而有效地支持移动性。 一种用于提供移动IPv6的设备（300）包括以下部分：移动接收处理器（323），其根据所接收的分组是绑定分组还是数据来输出移动节点和对端节点的归属地址以及与移动性相关的报头信息 包; 绑定高速缓存（302）和用于存储移动节点已经接收和发送的绑定信息的绑定更新存储器（303） 以及接收由对端节点生成的绑定消息的绑定接收器（325），从移动接收处理器（323）接收移动节点和对端节点的归属地址信息，并将关于绑定消息的信息提供给绑定缓存（302 ）和绑定更新存储（303）。

公开(公告)号：KR100826496B1

公开(公告)日：2008-05-02

申请号：KR1020070012158

申请日：2007-02-06

Applicant: 삼성전자주식회사

Inventor： 문주형

IPC: G11C7/10 ,  G11C7/22 ,  G11C8/10

CPC classification number: G06F13/405

Abstract: A semiconductor integrated circuit device and an operating method thereof are provided to increase the reusability of a peripheral circuit by integrating a control signal to control peripheral circuits comprised in the semiconductor integrated circuit. A first interface block interfaces with a first bus(120). A second interface block interfaces with a second bus(130). A clock detection block decodes a register value corresponding to a divided clock signal, and generates a state control signal on the basis of the decoded register value. A state machine receives first control signals received through the first interface block, and generates second control signals having a clock frequency corresponding to the register value on the basis of the state control signal.

Abstract translation: 提供半导体集成电路器件及其操作方法，通过集成控制信号来控制外围电路的可重用性，以控制半导体集成电路中包含的外围电路。 第一接口块与第一总线（120）接口。 第二接口块与第二总线（130）接口。 时钟检测块对与分频时钟信号对应的寄存器值进行解码，并根据解码的寄存器值生成状态控制信号。 状态机接收通过第一接口块接收到的第一控制信号，并且基于状态控制信号产生具有对应于寄存器值的时钟频率的第二控制信号。