디지털 듀티 사이클 보정 회로
    1.
    发明公开
    디지털 듀티 사이클 보정 회로 审中-实审
    数字周期校正电路

    公开(公告)号:KR1020140112927A

    公开(公告)日:2014-09-24

    申请号:KR1020130027626

    申请日:2013-03-15

    CPC classification number: H03K5/1565

    Abstract: A digital duty cycle correction circuit includes a duty cycle controller, a monitor, a voltage-frequency converter, a frequency counter, and a digital state machine. The duty cycle controller generates a first output clock signal and a second output clock signal by compensating a duty cycle of a first input clock signal and a duty cycle of a second input clock signal based on a digital duty control code. The monitor generates a first DC voltage and a second DC voltage by monitoring the first and second output clock signals. The voltage-frequency converter generates a first frequency signal, a second frequency signal, and a reference frequency signal by performing a voltage-frequency conversion on the first DC voltage, the second DC voltage, and a reference voltage. The frequency counter generates a first count value, a second count value, and a reference count value by counting pulses of the first and second frequency signals and pulses of the reference frequency signal. The digital state machine generates the digital duty control code based on the first count value, the second count value, and the reference count value.

    Abstract translation: 数字占空比校正电路包括占空比控制器,监视器,电压 - 频率转换器,频率计数器和数字状态机。 占空比控制器通过基于数字占空比控制代码补偿第一输入时钟信号的占空比和第二输入时钟信号的占空比来产生第一输出时钟信号和第二输出时钟信号。 监视器通过监视第一和第二输出时钟信号来产生第一直流电压和第二直流电压。 电压 - 频率转换器通过对第一DC电压,第二DC电压和参考电压执行电压 - 频率转换来产生第一频率信号,第二频率信号和参考频率信号。 频率计数器通过对第一和第二频率信号的脉冲和参考频率信号的脉冲进行计数来产生第一计数值,第二计数值和参考计数值。 数字状态机基于第一计数值,第二计数值和参考计数值生成数字占空比控制代码。

    내부 스큐를 보상하는 반도체 장치 및 그것의 동작 방법
    3.
    发明公开
    내부 스큐를 보상하는 반도체 장치 및 그것의 동작 방법 审中-实审
    用于内部钻孔的半导体器件补偿及其操作方法

    公开(公告)号:KR1020140090736A

    公开(公告)日:2014-07-18

    申请号:KR1020130002533

    申请日:2013-01-09

    CPC classification number: H03K5/153

    Abstract: The present invention relates to a semiconductor device compensating an external device and internal skew without a training process. The semiconductor device according to the present invention comprises a signal generating part generating and outputting a reference signal; a first receiving part receiving the reference signal and outputting a first output signal; a second receiving part receiving the reference signal to output a second output signal; a delay part delaying the first output signal for a certain time and outputting a delay signal; a sample part sampling the second output signal based on the delay signal to output sampling data; and a skew controlling part controlling the delay part based on the sampling data.

    Abstract translation: 本发明涉及补偿外部设备的半导体器件和内部偏斜,而不需要训练过程。 根据本发明的半导体器件包括产生并输出参考信号的信号产生部件; 接收参考信号并输出​​第一输出信号的第一接收部分; 接收所述参考信号以输出第二输出信号的第二接收部分; 延迟部分将所述第一输出信号延迟一定时间并输出延迟信号; 基于所述延迟信号对所述第二输出信号进行采样以输出采样数据的采样部分; 以及基于采样数据控制延迟部分的偏斜控制部分。

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