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公开(公告)号：KR1020130053632A
公开(公告)日：2013-05-24
申请号：KR1020110119147
申请日：2011-11-15
Applicant: 삼성전자주식회사
CPC classification number: G06F9/30032 , G06F9/3828
Abstract: PURPOSE: A device for minimizing overheads caused by communication between clusters and a method thereof are provided to improve the performance of codes used in a processor including a cluster structure by minimizing commands moving or copying a value between clusters. CONSTITUTION: A suggestive command generating unit(110) generates suggestive commands including copy commands to be executed for general commands in a basic block. An operand providing unit(130) inserts an operand providing command for providing an operand value of a copy command to be executed according to the execution of the suggestive command. The suggestive command includes an operand including the copy command to be executed with the general command. The operand including the copy command is formed of a bit for expressing the copy command according to settings of a value of 0 or 1. [Reference numerals] (110) Suggestive command generating unit; (120) Scheduling unit; (130) Operand providing unit
Abstract translation: 目的：提供一种用于最小化由群集之间的通信引起的开销的设备及其方法，以通过最小化在群集之间移动或复制值的命令来提高包括群集结构的处理器中使用的代码的性能。 构成：暗示命令生成单元（110）生成暗示命令，包括要在基本块中的一般命令执行的复制命令。 操作数提供单元（130）插入用于根据暗示命令的执行来提供要执行的复制命令的操作数值的操作数提供命令。 暗示命令包括一个操作数，其中包括要用一般命令执行的复制命令。 包括复制命令的操作数由用于根据值0或1的设置表示复制命令的位形成。[附图标记]（110）指示命令生成单元; （120）调度单位; （130）操作数提供单元
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公开(公告)号：KR101754203B1
公开(公告)日：2017-07-07
申请号：KR1020110005585
申请日：2011-01-19
Applicant: 삼성전자주식회사 , 포항공과대학교 산학협력단
CPC classification number: G06F15/7867 , G06F1/3287 , G06F8/4432 , G06F8/447 , G06F9/30083 , G06F9/30189 , G06F9/3889 , Y02D10/171 , Y02D50/20
Abstract: 본발명의일 양상에따른재구성가능프로세서는, 다수의펑션유니트(function unit, FU)를포함하고, 제 1 모드에서적어도하나의펑션유니트를포함하는제 1 그룹에기초하여제 1 유형의연산을처리하고, 제 2 모드에서적어도하나의펑션유니트를포함하는제 2 그룹에기초하여제 2 유형의연산을처리하는처리부, 및제 1 모드와제 2 모드간의모드전환을유도하는모드전환신호또는모드전환명령어에따라제 1 그룹또는제 2 그룹중 어느하나에선택적으로전원을공급하는전원관리부를포함할수 있다.
Abstract translation: 根据本发明的一个方面，多个基于包括一个功能单元（功能单元，FU）的第一组的第一类型的操作的可重构处理器，并且包括在第一模式中的至少一个功能单元 处理，至少一个模式切换信号或基于第二组包括功能单元以诱发第二类型的处理单元的处理操作之间的模式切换的模式切换，第一mitje模式和第二模式中的第二模式 以及电力管理单元，根据指令选择性地向第一组或第二组供电。
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公开(公告)号：KR101700406B1
公开(公告)日：2017-01-31
申请号：KR1020100114044
申请日：2010-11-16
Applicant: 삼성전자주식회사
CPC classification number: G06F15/7867 , G06F8/452 , G06F9/38 , G06F9/3853 , G06F9/3897 , G06F11/3409
Abstract: 재구성가능어레이의실행모드를동적으로결정하기위한장치및 방법이제공된다. 본발명의일 양상에따르면, 어떤루프의실행전에또는실행도중에루프에관한성능정보가얻어진다. 성능정보는루프를 VLIW 모드에서실행했을때와 CGA 모드에서실행했을때 어떤것이유리한지를나타낸다. 성능정보에서변수는루프의루프반복횟수이다. 그루프의루프반복횟수가정해지면성능정보에기초하여유리한모드를선택한다. 만약, 루프의루프반복회수가정해지지않는경우루프의실행시간에대한예측값을이용하여유리한모드를선택한다. 예측값은루프의실행시간을측정하고측정된값과이전의예측값에가중치를적용하여누적적으로합한값을이용할수 있다.
Abstract translation: 提供了用于动态地确定可重构阵列的执行模式的装置和方法。 可以在循环执行之前和/或期间获得循环的性能信息。 性能信息可用于确定是否以非常长的指令字（VLIW）模式或粗粒度阵列（CGA）模式操作装置。
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公开(公告)号：KR101603751B1
公开(公告)日：2016-03-16
申请号：KR1020100014851
申请日：2010-02-18
Applicant: 삼성전자주식회사
CPC classification number: G06F9/3822 , G06F9/30076 , G06F9/3017 , G06F9/3853
Abstract: VLIW 컴퓨터등과같은병렬처리컴퓨터를위한명령어압축장치및 방법이개시된다. 명령어압축장치는번들코드생성부, 명령어압축부, 및명령어변환부를포함한다. 압축될명령어들이입력되면번들코드생성부는번들코드를생성하는데, 이번들코드는현재명령어그룹이종료되었는지여부를지시하며, 또한현재명령어그룹이종료된경우에는뒤따르는명령어그룹이무연산(No OPeration, NOP) 명령어그룹인지도함께지시한다. 명령어압축부는번들코드생성부에서생성된번들코드에대응하여입력되는명령어들에포함된 NOP 명령어및/또는 NOP 명령어그룹을삭제한다. 번들코드를생성하는과정과명령어압축과정은동시에또는순차적으로수행될수 있다. 그리고명령어변환부는명령어압축부에서삭제되지않은명령어들각각에번들코드생성부에서생성된대응하는번들코드를포함시킨다.
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公开(公告)号：KR1020130046102A
公开(公告)日：2013-05-07
申请号：KR1020110110465
申请日：2011-10-27
Applicant: 삼성전자주식회사
CPC classification number: G06F9/5088 , G06F8/447 , G06F9/45558 , G06F11/3466 , G06F2009/4557 , G06F9/06 , G06F9/45504
Abstract: PURPOSE: A virtual architecture generation device and an operation method thereof are provided to generate a virtual architecture by considering the characteristics and requirements of an application, thereby considering only a design space required by the application and reducing compile time, and to improve the performance efficiency of the application, for example obtaining high performance with minimum hardware resources, obtaining a low-power effect by controlling the power of hardware. CONSTITUTION: A virtual architecture generation device(240) is able to generate a virtual architecture of a processor reconfigurable to correspond to an application. The virtual architecture generation device is able to include an analysis part(241) and a generation part(242). The analysis part is able to analyze the requirements(212) of the application, the requirements of a system running the application, and the characteristics of the application. The application requirements are able to be delivered in a pragma form from an application code(210). The system requirements are able to utilize the information collected during a runtime. The generation part is able to generate a virtual architecture corresponding to the application based on the three analyzed pieces of information and the physical architecture(211) information of the reconfigurable processor. At this time, the generation part can generate the virtual architecture in a way that the virtual architecture becomes a subset of the physical architecture of the reconfigurable processor. [Reference numerals] (210) Application code; (211) All HW information; (212) Requirements; (230) Binary; (240) Virtual architecture generation device; (241) Analysis part; (242) Generation part; (243) Virtual HW information
Abstract translation: 目的：提供一种虚拟架构生成装置及其操作方法，通过考虑应用程序的特性和要求来生成虚拟架构，从而仅考虑应用程序所需的设计空间，减少编译时间，提高性能效率 的应用，例如以最小的硬件资源获得高性能，通过控制硬件的功率获得低功耗效果。 构成：虚拟架构生成装置（240）能够生成可重新配置以对应于应用的处理器的虚拟架构。 虚拟架构生成装置能够包括分析部（241）和生成部（242）。 分析部分能够分析应用程序的需求（212），运行应用程序的系统的要求以及应用程序的特性。 应用程序要求能够以应用程序代码（210）的pragma形式提供。 系统要求能够利用运行时收集的信息。 生成部分能够基于三个分析的信息片段和可重构处理器的物理架构（211）信息来生成对应于应用的虚拟架构。 此时，生成部分可以以虚拟架构成为可重构处理器的物理架构的子集的方式生成虚拟体系结构。 （附图标记）（210）申请代码; （211）所有HW信息; （212）要求; （230）二进制; （240）虚拟架构生成装置; （241）分析部分; （242）一代; （243）虚拟硬件信息
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Patent Agency Ranking
公开(公告)号：KR1020110095049A
公开(公告)日：2011-08-24
申请号：KR1020100014851
申请日：2010-02-18
Applicant: 삼성전자주식회사
CPC classification number: G06F9/3822 , G06F9/30076 , G06F9/3017 , G06F9/3853
Abstract: PURPOSE: A device and method for compressing a command for a command parallel processing computer are provided to prevent a speed deterioration and a fetch overhead according to the cache mismatch. CONSTITUTION: A bundle code generator(110) indicates completion of a current instruction group if a command is inputted. If the current command group is completed, the bundle code generator generates a bundle code. A command compression unit(120) deletes a NOP command and/or NOP command group including the commands by corresponding to the bundle code. A command converting unit(130) includes the bundle code to the command.
Abstract translation: 目的：提供一种用于压缩命令并行处理计算机的命令的装置和方法，以根据高速缓存不匹配来防止速度恶化和提取开销。 构成：如果输入命令，则包码发生器（110）指示当前指令组的完成。 如果当前命令组已完成，则包代码生成器将生成捆绑代码。 命令压缩单元（120）通过对应于该包代码来删除包括命令的NOP命令和/或NOP命令组。 命令转换单元（130）包括该命令的束代码。
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公开(公告)号：KR101894752B1
公开(公告)日：2018-09-05
申请号：KR1020110110465
申请日：2011-10-27
Applicant: 삼성전자주식회사
CPC classification number: G06F9/5088 , G06F8/447 , G06F9/45558 , G06F11/3466 , G06F2009/4557
Abstract: 가상아키텍쳐생성장치, 런타임시스템, 멀티코어시스템및 그동작방법이개시된다. 본발명의일실시예에따른어플리케이션에대응하도록재구성가능한프로세서의가상아키텍쳐(Virtual Architecture)를생성하는가상아키텍쳐생성방법은, 상기어플리케이션의요구사항(Requirement), 상기어플리케이션을실행하는시스템의요구사항및 상기어플리케이션의특성을분석하는단계; 및상기재구성가능한프로세서의물리적아키텍쳐(Physical Architecture), 상기어플리케이션의요구사항, 상기시스템의요구사항및 상기어플리케이션의특성에기반하여, 상기어플리케이션에대응하는상기가상아키텍쳐를생성하는단계를포함할수 있다.
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公开(公告)号：KR101634118B1
公开(公告)日：2016-06-29
申请号：KR1020100025353
申请日：2010-03-22
Applicant: 삼성전자주식회사
CPC classification number: G06F12/0253
Abstract: 가비지실행할대상메모리영역을정확하게지정함으로써, 가비지컬렉션을정확하게실행할수 있는메모리관리장치및 방법이개시된다. 메모리관리장치는포인터표시비트에기초하여가비지컬렉션을실행할대상메모리영역을결정하고, 대상메모리영역에대한가비지컬렉션을실행한다. 메모리관리장치는포인터표시비트를생성하고, 생성된포인터표시비트를포인터필드에저장한다.
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9.发明公开
公开(公告)号：KR1020130066403A
公开(公告)日：2013-06-20
申请号：KR1020110133200
申请日：2011-12-12
Applicant: 삼성전자주식회사
Abstract: PURPOSE: A reformable processor based partial power management, a code converting device thereof, and a method thereof are provided to reduce the waste of power supplied to unnecessary resources by partially supplying power in a CGA(Coarse Grained Array) mode. CONSTITUTION: A processing unit(101) includes PEs(Processing Elements), processes operation based on a first group including the PEs, and processes the operation based on a second group including the PEs in a CGA mode. A power supply unit(102) supplies power to a part of the PEs in the second group. If a program code is executed in the CGA mode, the power supply unit supplies the power to the rest of the PEs. [Reference numerals] (102) Power supply unit; (103) Mode conversion control unit; (130) VLIW memory; (140) CGA memory; (150) Center register file
Abstract translation: 目的：提供一种基于可重构处理器的部分电源管理，其代码转换装置及其方法，以通过以CGA（粗粒度阵列）模式部分供电来减少供应给不必要资源的电力的浪费。 构成：处理单元（101）包括PE（处理单元），处理基于包括PE的第一组的操作，并且以CGA模式处理基于包括PE的第二组的操作。 电源单元（102）向第二组中的PE的一部分供电。 如果在CGA模式下执行程序代码，则电源单元向其余的PE提供电源。 （附图标记）（102）电源单元; （103）模式转换控制单元; （130）VLIW存储器; （140）CGA存储器; （150）中心寄存器文件
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公开(公告)号：KR1020120084186A
公开(公告)日：2012-07-27
申请号：KR1020110005585
申请日：2011-01-19
Applicant: 삼성전자주식회사 , 포항공과대학교 산학협력단
CPC classification number: G06F15/7867 , G06F1/3287 , G06F8/4432 , G06F8/447 , G06F9/30083 , G06F9/30189 , G06F9/3889 , Y02D10/171 , Y02D50/20 , G06F8/47
Abstract: PURPOSE: A power gating based reconfigurable processor, a compile apparatus thereof and a method thereof are provided to selectively supply the power to a single module in each mode, thereby preventing a waste of the power. CONSTITUTION: A processing unit(101) includes an FU(Function Unit), and processes a first type operation based on a first group including the FU in a first mode, and processes a second type operation based on a second group including the FU in a second mode. A power management unit(103) selectively supplies the power to the first group or the second group according to a mode switching signal or a instruction. The processing unit processes a loop operation by using a CGA(Coarse-Grained Array) module defined in the first group in a CGA mode, and processes the rest by using a VLIW(Very Long Instruction Word) module defined in the second group in a VLIW mode.
Abstract translation: 目的：提供一种基于电源门控的可重构处理器，其编译装置及其方法，以在每种模式中选择性地向单个模块供电，从而防止电力浪费。 构成：处理单元（101）包括FU（功能单元），并且在第一模式中处理基于包括FU的第一组的第一类型操作，并且基于包括FU的第二组处理第二类型操作 第二种模式。 功率管理单元（103）根据模式切换信号或指令有选择地将功率提供给第一组或第二组。 处理单元通过使用CGA模式中的第一组中定义的CGA（粗粒子阵列）模块处理循环操作，并且通过使用在第二组中定义的VLIW（超长指令字）模块处理其余部分 VLIW模式。
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