公开(公告)号：KR1020100067487A

公开(公告)日：2010-06-21

申请号：KR1020080126070

申请日：2008-12-11

Applicant: 삼성전자주식회사

Inventor： 이상훈 ,  변언조 ,  우철종 ,  오세장

IPC: G01R31/3183 ,  G01R31/00 ,  H04B10/25 ,  G11C29/56

CPC classification number: G11C29/56 ,  G11C29/32 ,  G11C2029/2602 ,  G11C2029/5602

Abstract: PURPOSE: A test interface device, a test system, and an optical interface memory device are provided to reduce the use of an optical resource using serialization and paralleling technology. CONSTITUTION: A first serializing unit(131) receives a parallel test signal from an automatic test device and serializes a parallel test signal into a serial test signal. A first optical transmitter(133) receives a serial test signal from the first serializing unit, converts the serial test signal into an optical test signal, and transmits the optical test signal. A first optical receiver(134) receives the optical test signal and converts the optical test signal into the serial test signal. A first paralleling unit receives the serial test signal from the first optical receiver, converts the serial test signal into the parallel test signal, and transmits the parallel test signal to a test target device.

Abstract translation: 目的：提供测试接口设备，测试系统和光学接口存储设备，以减少使用串行化和并行技术的光学资源的使用。 构成：第一串行化单元（131）从自动测试装置接收并行测试信号，并行串行测试信号为串行测试信号。 第一光发射机（133）从第一串行化单元接收串行测试信号，将串行测试信号转换为光测试信号，并发送光测试信号。 第一光接收器（134）接收光测试信号并将光测试信号转换成串行测试信号。 第一并联单元从第一光接收器接收串行测试信号，将串行测试信号转换成并行测试信号，并将并行测试信号发送到测试对象设备。

公开(公告)号：KR1020100085390A

公开(公告)日：2010-07-29

申请号：KR1020090004645

申请日：2009-01-20

Applicant: 삼성전자주식회사

Inventor： 변언조 ,  이상훈 ,  오세장 ,  우철종

IPC: G01R31/3183 ,  G01R31/3177 ,  G01R31/26 ,  H01L21/66

CPC classification number: G01R31/31932 ,  G11C29/56 ,  G11C29/56012 ,  G11C2029/5602

Abstract: PURPOSE: A semiconductor device test apparatus and a semiconductor device test method are provided to determine the bad quality of a semiconductor device of an object by improving the operating speed of the semiconductor device of an object. CONSTITUTION: An object(300) positions a semiconductor device to be inspected. Automatic test equipment(100) inputs test signals to the object and analyzes test result signals. An interface unit(200) is interposed between the object and the auto test equipment, compares test signals with test result signals, and outputs test determination signals to the auto test equipment.

Abstract translation: 目的：提供半导体器件测试装置和半导体器件测试方法，以通过提高对象的半导体器件的操作速度来确定对象的半导体器件的质量差。 构成：物体（300）定位待检查的半导体器件。 自动测试设备（100）向测试对象输入测试信号并分析测试结果信号。 接口单元（200）介于物体与自动测试设备之间，将测试信号与测试结果信号进行比较，并向自动测试设备输出测试确定信号。

公开(公告)号：KR101535228B1

公开(公告)日：2015-07-08

申请号：KR1020090041749

申请日：2009-05-13

Applicant: 삼성전자주식회사

Inventor： 오세장 ,  변언조 ,  우철종

IPC: G01R31/3183 ,  G01R31/26 ,  H01L21/66

CPC classification number: G01R31/2831 ,  G01R31/31915 ,  G01R31/31922 ,  G11C29/56

Abstract: 본발명은반도체장치의테스트를위하여반도체장치와외부테스트장치사이에결합되는빌트오프테스트장치에관한것이다. 본발명의일 실시예에따른빌트오프테스트장치는, 반도체장치와상기반도체장치를테스트하기위한외부테스트장치사이에결합되는빌트오프테스트장치로서, 상기빌트오프테스트장치는, 상기반도체장치의동작속도에기초하여, 상기외부테스트장치로부터입력되는클럭주파수를채배하여, 테스트클럭주파수를생성하는주파수채배부; 상기테스트클럭주파수를기초로상기외부테스트장치로부터입력되는테스트신호를디코딩하여테스트정보를생성하는명령디코더부; 및상기테스트정보에따라상기반도체장치에대한테스트를수행하고, 상기반도체장치로부터출력된테스트데이터로부터상기반도체장치의불량여부를판정하여, 판정데이터를상기외부테스트장치에전달하는테스트실행부를포함할수 있다.

公开(公告)号：KR101511161B1

公开(公告)日：2015-04-13

申请号：KR1020090004645

申请日：2009-01-20

Applicant: 삼성전자주식회사

Inventor： 변언조 ,  이상훈 ,  오세장 ,  우철종

IPC: G01R31/3183 ,  G01R31/3177 ,  G01R31/26 ,  H01L21/66

CPC classification number: G01R31/31932 ,  G11C29/56 ,  G11C29/56012 ,  G11C2029/5602

Abstract: 본발명의반도체소자검사장치는제1 주파수의테스트신호를주파수체배부에입력하는자동테스트설비부와, 상기주파수체배부에서주파수가체배되어제2 주파수의테스트신호가입력되고반도체소자가위치하는피검사부와, 상기피검사부의상기반도체소자에서출력되는제2 주파수의테스트결과신호와상기주파수체배부를통해제2 주파수의테스트신호가입력되고, 상기테스트결과신호와상기테스트신호를비교하여상기제1 주파수로고 레벨및 저레벨의테스트판정신호를출력하는제1 비교기와, 상기피검사부의반도체소자에서출력되는제2 주파수의테스트결과신호와상기주파수체배부를통해제2 주파수의테스트신호가입력되고, 위상선택기를포함하여상기테스트결과신호와상기테스트신호간의위상을비교하여상기제1 주파수의테스트판정신호를출력하는제2 비교기와, 및상기자동테스트설비부로부터의선택신호에따라상기제1 비교기및 제2 비교기중어느하나를선택하는선택기를포함한다.

公开(公告)号：KR1020120102451A

公开(公告)日：2012-09-18

申请号：KR1020110020623

申请日：2011-03-08

Applicant: 삼성전자주식회사

Inventor： 김준연 ,  우철종 ,  조창현 ,  김형순

IPC: G01R31/28

CPC classification number: G01R31/2889

Abstract: PURPOSE: A test interface board and a test system including the same are provided to improve the reliability of a test process and reduce cost and time for a test. CONSTITUTION: Branch wires(150-1~150-3) include main wires(152-1~152-3) separately connected with tester channels(410-1~410-3) and sub wires(154-1~154-3) branched from the main wires. Contacts(160) are separately connected with the sub wires and separately contacted with electrodes(310-11~310-m3) of semiconductor devices(300-1~300-m). A control unit(110) includes a memory(120), a control unit(130), and a switching unit(140). The switching unit includes plural switching elements(140-11~140-3m). The switching elements are separately installed on the sub wires to separately open or close the sub wires. [Reference numerals] (120) Memory; (130) Control unit

Abstract translation: 目的：提供测试接口板和包括其的测试系统，以提高测试过程的可靠性，并降低测试的成本和时间。 规定：分支线（150-1〜150-3）包括与测试仪通道（410-1〜410-3）和子线（154-1〜154-3）分别连接的主线（152-1〜152-3） ）从主线分支。 触点（160）与子线分开连接，并与半导体器件（300-1〜300-m）的电极（310-11〜310-m3）分开接触。 控制单元（110）包括存储器（120），控制单元（130）和切换单元（140）。 开关单元包括多个开关元件（140-11〜140-3m）。 开关元件分别安装在副电线上，以单独打开或关闭子电线。 （附图标记）（120）存储器; （130）控制单元

公开(公告)号：KR1020100122719A

公开(公告)日：2010-11-23

申请号：KR1020090041749

申请日：2009-05-13

Applicant: 삼성전자주식회사

Inventor： 오세장 ,  변언조 ,  우철종

IPC: G01R31/3183 ,  G01R31/26 ,  H01L21/66

CPC classification number: G01R31/2831 ,  G01R31/31915 ,  G01R31/31922 ,  G11C29/56

Abstract: PURPOSE: A built-off test device is provided to test a semiconductor device which is rapidly operated. CONSTITUTION: A frequency multiplying part(310) generates a test clock frequency by multiplying a clock frequency which is inputted from an external test device based on the operation speed of a semiconductor device. A command decoder(320) generates test information by decoding a test signal which is inputted from the external test device based on a test clock frequency. A test executing part(330) determines whether the semiconductor device is in an abnormal state from the test data outputted from the semiconductor device.

Abstract translation: 目的：提供一种内置测试装置来测试快速操作的半导体器件。 构成：乘法部分（310）根据半导体器件的运行速度乘以从外部测试装置输入的时钟频率来产生测试时钟频率。 命令解码器（320）通过根据测试时钟频率对从外部测试设备输入的测试信号进行解码来产生测试信息。 测试执行部分（330）根据从半导体器件输出的测试数据确定半导体器件是否处于异常状态。