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公开(公告)号：KR1020160006494A
公开(公告)日：2016-01-19
申请号：KR1020140086155
申请日：2014-07-09
Applicant: 삼성전자주식회사
CPC classification number: A61B8/4444 , A61B2562/166 , B06B1/0292 , H01L2224/48091 , H01L2224/4824 , H01L2224/49433 , H01L2924/00014 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: 와이어본딩을이용한정전용량미세가공초음파변환기프로브가개시된다. 개시된프로브는제1면상에서마주보는양측에형성된복수의제1 전극패드를포함하는정전용량미세가공초음파변환기(CMUT) 칩과, 상기 CMUT 칩의상기제1면상에배치되며상기복수의제1 전극패드를노출시키는인쇄회로기판과, 상기인쇄회로기판상에서상기복수의제1 전극패드와대응되게형성된복수의제2 전극패드와, 서로대응되는상기제1 전극패드와상기제2 전극패드를연결시킨복수의와이어를포함한다.
Abstract translation: 提供使用引线接合的电容微加工超声波换能器（CMUT）探针。 CMUT探针包括CMUT芯片，其包括设置在其第一表面的两个相对侧上的多个第一电极焊盘，布置在CMUT芯片的第一表面上并被配置的印刷电路板（PCB） 露出多个第一电极焊盘，多个第二电极焊盘，其布置在PCB上并且对应于多个第一电极焊盘中的相应的第一电极焊盘;以及多个焊丝，其连接多个第一电极焊盘中的每个第一电极焊盘， 电极焊盘连接到多个第二电极焊盘中的对应的一个。
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公开(公告)号：KR101520070B1
公开(公告)日：2015-05-14
申请号：KR1020080092844
申请日：2008-09-22
Applicant: 삼성전자주식회사
Abstract: 본 발명은 압전형 마이크로 스피커에 관한 것으로, 본 발명의 일 양상에 의하면 압전체와 전극을 구비하는 구동부가 진동판의 두께 방향 상하에 대칭적으로 형성된다. 이때 전도성 박막을 진동판으로 사용하는 경우 진동판 자체를 공통 전극으로 사용하는 것이 가능하며, 비 전도성 박막을 진동판으로 사용하는 경우에는 구동부에 별도의 공통 전극이 필요하다. 이와 같이 진동판의 상하에 구동부가 대칭적으로 배치되면 진동판의 변형 효율을 향상시키고 공진 주파수를 낮출 수 있는 효과가 있다.
마이크로 스피커, 압전형, 진동박막, 압전박막, 다이어프램-
公开(公告)号：KR1020100071607A
公开(公告)日：2010-06-29
申请号：KR1020080130385
申请日：2008-12-19
Applicant: 삼성전자주식회사
CPC classification number: H04R17/00 , H04R17/02 , Y10T29/42 , H04R17/005 , B06B1/0666 , G10K9/122 , H04R31/006
Abstract: PURPOSE: A piezoelectric acoustic transducer and a method for fabricating the same are provided to obtain large transformation amount under a low driving voltage using parlylene or low stress non-stoichiometric silicon nitride film on the external side of a diaphragm. CONSTITUTION: A through region is formed in a substrate(110). A piezoelectric unit(150) is located on a part of the central part of the through region. The piezoelectric unit includes a first electrode and a second electrode which are arranged on both sides of the piezoelectric unit. A transforming film(130) connects and elastically transforms the peripheral of the piezoelectric unit and a substrate. A transformation is delivered to the piezoelectric unit and the transforming film is vibrated with the piezoelectric unit.
Abstract translation: 目的：提供一种压电声换能器及其制造方法，以便在隔膜的外侧使用亚甲基或低应力非化学计量的氮化硅膜，在低驱动电压下获得大的相变量。 构成：在基板（110）中形成贯通区域。 压电单元（150）位于贯通区域的中心部分的一部分。 压电单元包括布置在压电单元两侧的第一电极和第二电极。 变换膜（130）连接并弹性地变换压电单元的周边和基板。 对压电单元进行转换，并且转印膜与压电单元振动。
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公开(公告)号：KR1020070009136A
公开(公告)日：2007-01-18
申请号：KR1020050064169
申请日：2005-07-15
Applicant: 삼성전자주식회사
IPC: H01L21/60
CPC classification number: H01L25/0657 , H01L21/76898 , H01L23/481 , H01L25/50 , H01L2224/9202 , H01L2225/06513 , H01L2225/06541 , H03H9/0547
Abstract: A packaging chip and a fabrication method therefor are provided to reduce the number of processes of manufacturing via holes by forming interconnection electrodes directly connected to circuit elements formed on wafers. A packaging chip includes plural wafers(110,120,130,140) sequentially stacked, and plural interconnection electrodes(150a,150b,160a,160b,170a,170b) directly connecting the wafers from an upper surface of an uppermost wafer of the wafers to the other wafers. At least one or more wafers have cavities(123,133,143) of a predetermined size. At least one or more wafers have a predetermined circuit device mounted thereon. Plural pads are independently arranged on the uppermost wafer.
Abstract translation: 提供了一种封装芯片及其制造方法，通过形成直接连接到形成在晶片上的电路元件的互连电极来减少制造通孔的工艺数量。 包装芯片包括顺序层叠的多个晶片（110,120,130,140）以及将晶片从晶片的最上面晶片的上表面直接连接到其它晶片的多个互连电极（150a，150b，160a，160b，170a，170b）。 至少一个或多个晶片具有预定尺寸的空腔（123,133,143）。 至少一个或多个晶片具有安装在其上的预定电路装置。 多个垫独立地布置在最上面的晶片上。
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Patent Agency Ranking6.发明授权웨이퍼 레벨 인캡슐레이션 칩 및 인캡슐레이션 칩 제조방법 有权WAFER LEVEL ENCAPSULATION CHIP AND ENCAPSULATION CHIP MANUFACTURING METHOD
公开(公告)号：KR100664310B1
公开(公告)日：2007-01-04
申请号：KR1020050063439
申请日：2005-07-13
Applicant: 삼성전자주식회사
IPC: H01L23/02
CPC classification number: H01L23/04 , H01L23/10 , H01L2924/01079 , H01L2924/16235
Abstract: A wafer level incapsulation chip and a method of manufacturing the same are provided to minimize damages of chips at chip handling by encapsulating predetermined areas of an upper portion of a packaging chip. An encapsulation chip includes a device substrate(310), a circuit module(320) mounted on the device substrate, a bonding layer deposited on a predetermined area of the device substrate, a protection cap(330) forming a cavity(340) over the circuit module and bonded to the device substrate by the bonding layer, and encapsulation portions(390) formed on predetermined areas of the bonding layer and the protection cap. The protection cap has at least one or more via(360) passing through the protection cap, a metal layer connecting the via with the circuit module, and at least one or more electrode(380) electrically connected to the via over an upper surface of the protection cap.
Abstract translation: 提供晶片级封装芯片及其制造方法，以通过封装包装芯片的上部的预定区域来最小化芯片处理时的芯片损坏。 封装芯片包括器件衬底（310），安装在器件衬底上的电路模块（320），沉积在器件衬底的预定区域上的结合层，形成空腔（340）的保护帽 电路模块，并通过接合层与器件基板接合，以及形成在接合层的预定区域和保护盖上的封装部（390）。 保护盖具有穿过保护帽的至少一个或多个通孔（360），连接通孔与电路模块的金属层，以及至少一个或多个电极（380），其电连接到通孔的上表面 保护帽。
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公开(公告)号：KR100424459B1
公开(公告)日：2004-03-26
申请号：KR1020010073465
申请日：2001-11-23
Applicant: 삼성전자주식회사
IPC: G02B6/40
Abstract: PURPOSE: A method for aligning optical fiber blocks is provided to align easily the first and the second optical fiber arrays on a main block by using an auxiliary block. CONSTITUTION: An alignment process for the first optical fiber array is performed to form the first optical fiber array on continuous grooves of odd numbers or continuous grooves of even numbers(110,120). The alignment process for the first optical fiber array includes a loading process of the first optical fiber array and a fixing process of the first optical fiber array. The alignment process for the second optical fiber array is performed by inserting optical fibers of the second optical fiber array between neighboring optical fibers(130). The loading process for the first and the second optical fiber arrays are performed(140). A glass plate is aligned(150).
Abstract translation: 目的：提供一种用于对准光纤块的方法，以通过使用辅助块来容易地将主块上的第一和第二光纤阵列对准。 组成：执行第一光纤阵列的对准过程，以在偶数（110,120）的奇数或连续凹槽的连续凹槽上形成第一光纤阵列。 第一光纤阵列的对准过程包括第一光纤阵列的加载过程和第一光纤阵列的固定过程。 通过将第二光纤阵列的光纤插入相邻光纤（130）之间来执行第二光纤阵列的对准过程。 执行第一和第二光纤阵列的加载过程（140）。 玻璃板对齐（150）。
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公开(公告)号：KR1020030042720A
公开(公告)日：2003-06-02
申请号：KR1020010073465
申请日：2001-11-23
Applicant: 삼성전자주식회사
IPC: G02B6/40
Abstract: PURPOSE: A method for aligning optical fiber blocks is provided to align easily the first and the second optical fiber arrays on a main block by using an auxiliary block. CONSTITUTION: An alignment process for the first optical fiber array is performed to form the first optical fiber array on continuous grooves of odd numbers or continuous grooves of even numbers(110,120). The alignment process for the first optical fiber array includes a loading process of the first optical fiber array and a fixing process of the first optical fiber array. The alignment process for the second optical fiber array is performed by inserting optical fibers of the second optical fiber array between neighboring optical fibers(130). The loading process for the first and the second optical fiber arrays are performed(140). A glass plate is aligned(150).
Abstract translation: 目的：提供一种用于对准光纤块的方法，通过使用辅助块来容易地使主块上的第一和第二光纤阵列对准。 构成：执行用于第一光纤阵列的对准过程，以在奇数连续槽或偶数连续槽（110,120）上形成第一光纤阵列。 第一光纤阵列的对准过程包括第一光纤阵列的加载过程和第一光纤阵列的固定过程。 通过将第二光纤阵列的光纤插入相邻光纤（130）之间来执行第二光纤阵列的对准过程。 执行第一和第二光纤阵列的加载过程（140）。 对准玻璃板（150）。
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公开(公告)号：KR101652784B1
公开(公告)日：2016-09-09
申请号：KR1020150044552
申请日：2015-03-30
Applicant: 삼성전자주식회사
IPC: H04R17/00 , B06B1/06 , H01L41/083 , H04R31/00
Abstract: 압전형음향변환기및 이의제조방법이개시된다. 개시된압전형음향변환기는다이어프램의일부에압전부를형성하고, 나머지영역에변형막을형성하여, 압전부의압전변형력이압전부를직접적으로휘게하지않고변형막에비트는힘으로작용하여다이어프램의진동특성을향상시킨다.
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公开(公告)号：KR101609270B1
公开(公告)日：2016-04-06
申请号：KR1020090074283
申请日：2009-08-12
Applicant: 삼성전자주식회사
CPC classification number: H04R17/00 , Y10T29/49005 , Y10T156/10
Abstract: 압전형마이크로스피커및 그제조방법이개시된다. 개시된압전형마이크로스피커는, 디바이스플레이트와, 디바이스플레이트의전면에접합된전면플레이트와, 디바이스플레이트의후면에접합된후면플레이트를구비한다. 디바이스플레이트에는다이어프램과, 다이어프램을진동시키기위한압전구동부와, 다이어프램의전방에위치하는전면캐비티가마련된다. 전면플레이트에는전면캐비티와연통되는방사홀이마련된다. 후면플레이트는압전구동부와마주보는표면에형성된후면캐비티와, 후면캐비티와연통되는벤트홀을가진다. 후면캐비티의내측면에는흡음층이형성되고, 이흡음층은다이어프램으로부터후방으로방사된음향을흡수하여그 음향이후면플레이트에서반사되는것을억제한다.
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