-
公开(公告)号：KR1020060116916A
公开(公告)日：2006-11-16
申请号：KR1020050039441
申请日：2005-05-11
Applicant: 삼성전자주식회사
CPC classification number: G06T15/04 , G06T2200/28
Abstract: A texture cache, a 3D graphics system with the same, and a method of controlling the 3D graphics system are provided to effectively cache texture data in various formats without increasing a hardware size. A texture cache(80) includes a data memory(860) for storing texture data, a tag memory(870) for storing the address of the texture data, a texture analyzer(810) for analyzing characteristic information of the texture data, and a controller(820) for controlling a line size of the data memory and allocating an address storage region of the tag memory in response to the analysis result. A 3D graphics system includes a main memory for storing a plurality of textures, a texture cache for copying a part of the plurality of textures and storing the copied textures, and a texture processor(70) for performing texture filtering using the textures stored in the cache memory. The texture processor generates the addresses of textures to be used in the texture filtering and characteristic information of the textures.
Abstract translation: 提供纹理高速缓存，具有相同的3D图形系统以及控制3D图形系统的方法，以有效地缓存各种格式的纹理数据而不增加硬件尺寸。 纹理缓存（80）包括用于存储纹理数据的数据存储器（860），用于存储纹理数据的地址的标签存储器（870），用于分析纹理数据的特征信息的纹理分析器（810） 控制器（820），用于响应分析结果控制数据存储器的行大小并分配标签存储器的地址存储区域。 3D图形系统包括用于存储多个纹理的主存储器，用于复制多个纹理的一部分并存储复制的纹理的纹理缓存，以及纹理处理器（70），用于使用存储在所述纹理中的纹理来执行纹理过滤 高速缓存存储器。 纹理处理器生成要在纹理过滤中使用的纹理地址和纹理的特征信息。
-
公开(公告)号：KR1020050020125A
公开(公告)日：2005-03-04
申请号：KR1020030057834
申请日：2003-08-21
Applicant: 삼성전자주식회사
Inventor： 정영진
IPC: H01L21/68
Abstract: PURPOSE: A wafer position sensing device of semiconductor production equipment is provided to reduce the number of wafer position sensors by installing a sensor for detecting a position of a wafer at a robot blade. CONSTITUTION: A wafer sensor(54) is installed at a center part of a robot blade on which a wafer is loaded, in order to sense the presence of the wafer. First and second wafer position sensors(56,58) are installed at end parts of the robot blade on which the wafer of the robot blade is normally loaded, in order to sense the position of the wafer. A controller(60) is used for receiving a wafer sensing signal from the wafer sensor(54) and wafer position sensing signals from the first and second wafer position sensors(56,58), and an interlock signal when the wafer is loaded in an abnormal state.
Abstract translation: 目的：提供半导体生产设备的晶片位置检测装置，通过安装用于检测机器人刀片上的晶片位置的传感器来减少晶片位置传感器的数量。 构成：晶片传感器（54）安装在机器人叶片的装载有晶片的中心部分，以便感测晶片的存在。 第一和第二晶片位置传感器（56,58）安装在机器人刀片的正常加载晶片的机器人刀片的端部处，以便感测晶片的位置。 控制器（60）用于接收来自晶片传感器（54）的晶片感测信号和来自第一和第二晶片位置传感器（56,58）的晶片位置感测信号，以及当将晶片加载到 异常状态
-
公开(公告)号：KR1020170136409A
公开(公告)日：2017-12-11
申请号：KR1020160144663
申请日：2016-11-01
Applicant: 삼성전자주식회사
Abstract: 본발명의컴퓨팅시스템은성능저하를최소로하기위해, 암호화되는 Data와암호화되지않는데이터의이동경로를완전히분리하고, 이를위해, 주소공간상에가상의보안메모리를만들고 CPU가그 가상보안메모리에데이터를쓰면하드웨어가자동으로데이터를암호화하여 DRAM의지정된영역에저장하고, CPU가데이터를읽으면자동으로 DRAM의지정된영역에서읽어서복호화하여 CPU에전달할수 있다. 이로써, 전체시스템성능에는영향을주지않으면서, 일부데이터만암호화로보호할수 있다.
Abstract translation: 为了使性能下降最小化，本发明的计算系统将加密数据的路径与未加密数据的路径完全分开，从而在地址空间上创建安全存储器， 硬件自动加密数据并将其存储在DRAM的指定区域，当CPU读取数据时，它可以自动从DRAM的指定区域读取数据，并将其解密并传送到CPU。 这允许一些数据通过加密来保护而不影响整体系统性能。
-
公开(公告)号：KR1020140095296A
公开(公告)日：2014-08-01
申请号：KR1020130008117
申请日：2013-01-24
Applicant: 삼성전자주식회사
CPC classification number: G06T1/60
Abstract: The present invention relates to a method for operating a pixel cache. The operating method of the present invention includes storing image plane data of an image stored in a main memory into one linefill unit among a plurality of linefill units; and outputting the image plane data stored in the linefill unit to a processor. The linefill unit is a processing unit stored and outputted in the pixel cache at a time. An image plane includes two or more pixels in a row direction and two or more pixels in a column direction, and has the same size with the linefill unit.
Abstract translation: 本发明涉及一种操作像素高速缓存的方法。 本发明的操作方法包括将存储在主存储器中的图像的图像平面数据存储在多个线填充单元中的一个线填充单元中; 并将存储在所述行填充单元中的图像平面数据输出到处理器。 线填充单元是一次存储并输出在像素高速缓存中的处理单元。 图像平面包括行方向上的两个或更多个像素和列方向上的两个或更多个像素，并且与线填充单元具有相同的尺寸。
-
-
Patent Agency Ranking
公开(公告)号：KR1020060109738A
公开(公告)日：2006-10-23
申请号：KR1020050032042
申请日：2005-04-18
Applicant: 삼성전자주식회사
IPC: H01L27/115 , B82Y10/00
CPC classification number: H01L29/42324 , B82Y10/00 , H01L21/28273 , H01L29/788
Abstract: A nonvolatile memory device is provided to enhance erase efficiency by using at least one or more nano tubes. A nonvolatile memory device comprises a floating gate on a semiconductor substrate(200), a control gate(250) on the floating gate, an insulating layer(240) interposed between the floating gate and the control gate, and at least one or more nano tubes. The nano tubes(230) are formed in the insulating layer. The nonvolatile memory device further includes source/drain regions, wherein the source/drain regions are formed in the substrate. A carbon nano tube is used as the nano tube. The carbon nano tube is formed by performing a catalyst growth using Co or Ni as a catalyst.
Abstract translation: 提供非易失性存储器件以通过使用至少一个或多个纳米管来提高擦除效率。 非易失性存储器件包括在半导体衬底（200）上的浮置栅极，浮置栅极上的控制栅极（250），置于浮置栅极和控制栅极之间的绝缘层（240）和至少一个或多个纳米 管。 纳米管（230）形成在绝缘层中。 非易失性存储器件还包括源极/漏极区域，其中源极/漏极区域形成在衬底中。 使用碳纳米管作为纳米管。 通过使用Co或Ni作为催化剂进行催化剂生长来形成碳纳米管。
-
公开(公告)号：KR1020060067583A
公开(公告)日：2006-06-20
申请号：KR1020040106394
申请日：2004-12-15
Applicant: 삼성전자주식회사
IPC: G06F12/00
CPC classification number: G06T1/60
Abstract: A memory controller having graphic processing function that includes a graphic processing unit operating in response to a selection signal from a master, and a memory interface for storing outputs of the graphic processing unit in an external memory at and receiving graphic data from the external memory to provide the graphic data to the graphic processing unit.
-
公开(公告)号：KR1020050091851A
公开(公告)日：2005-09-15
申请号：KR1020040016514
申请日：2004-03-11
Applicant: 삼성전자주식회사
Inventor： 정영진
IPC: H01L21/205
CPC classification number: H01L21/67126
Abstract: 본 발명은 2중 밀봉 구조를 갖는 반도체 제조 장치에 관한 것으로, 공정챔버의 내부와 외부를 밀봉하기 위해 사용되던 구리 가스킷을 열팽창 계수가 작고 내구력이 강한 재질의 원형 링으로 구성하고, 또한 공정챔버의 하단부에서 벨로우즈를 포함한 구동부재 사이를 원통 형상의 스토퍼로 완전 밀봉하여 벨로우즈와 스토퍼에 의해 2중 밀봉 구조를 갖도록 구성함으로써, 누설(Leak)이 발생되는 것을 2중으로 방지할 수 있기 때문에 히터 블록을 자주 교체하지 않아도 되는 장점이 있고, 또한 안정적인 공정 상태에서 공정이 진행할 수 있는 장점이 있다.
-
公开(公告)号：KR1020050007910A
公开(公告)日：2005-01-21
申请号：KR1020030047542
申请日：2003-07-12
Applicant: 삼성전자주식회사
IPC: G11C11/406
CPC classification number: G11C11/40626 , G11C11/406 , G11C2211/4061
Abstract: PURPOSE: A memory controller for controlling the refresh period of a memory and a method for controlling the refresh period are provided to improve the operational performance by setting a refresh period appropriate to the operational state and temperature of the current memory. CONSTITUTION: A method for controlling the refresh period of a memory includes the steps of: (a) generating(110) the temperature measurement command to measure the operational temperature of the memory by a predetermined time; (b) receiving(120) the measured temperature in response to the temperature measurement command; (c) going back to the step (a) if the measured temperature is equal to the reference temperature; and (d) applying the refresh command to the memory in response to the changed refresh period.
Abstract translation: 目的：提供一种用于控制存储器的刷新周期的存储器控制器和用于控制刷新周期的方法，以通过设置适合于当前存储器的操作状态和温度的刷新周期来提高操作性能。 构成：用于控制存储器的刷新周期的方法包括以下步骤：（a）产生（110）温度测量命令以在预定时间内测量存储器的工作温度; （b）响应温度测量命令接收测量温度（120）; （c）如果测量的温度等于参考温度，则回到步骤（a）; 以及（d）响应于改变的刷新周期将刷新命令应用于存储器。
-
公开(公告)号：KR1020140072358A
公开(公告)日：2014-06-13
申请号：KR1020120138888
申请日：2012-12-03
Applicant: 삼성전자주식회사
IPC: H01L21/28 , H01L21/768
CPC classification number: H01L21/76897 , H01L21/7682
Abstract: A method for manufacturing a semiconductor device is provided. A contact mold film is formed on a substrate, and first holes penetrating the contact mold film are formed. A wiring mold film is formed on the contact mold film to form a first air gap inside of the first holes. Trenches are formed which expose the first holes inside the wiring mold film. After forming the trenches, second holes are formed continuously etching the wiring mold film which is disposed inside of the first holes and defines the first air gap. Wirings and contacts connected to each wiring are formed inside of the trenches and the second holes.
Abstract translation: 提供一种制造半导体器件的方法。 在基板上形成接触模膜，形成贯穿接触模膜的第一孔。 在接触模膜上形成布线模膜，以在第一孔内形成第一气隙。 形成露出布线模具膜内的第一孔的沟槽。 在形成沟槽之后，形成第二孔，连续地蚀刻设置在第一孔内部的布线模膜，并限定第一气隙。 连接到每个布线的布线和触点形成在沟槽和第二孔内部。
-
-
-
-
-
-
-
-
-
Search Results
25
records
(took 0.025 seconds)
