公开(公告)号：KR1020160134940A

公开(公告)日：2016-11-24

申请号：KR1020150066936

申请日：2015-05-13

Applicant: 삼성전자주식회사

Inventor： 송주학 ,  조성민

IPC: H01L29/778 ,  H01L29/78 ,  H01L29/49

CPC classification number: H01L23/5226 ,  H01L21/76831 ,  H01L21/76883 ,  H01L27/11582

Abstract: 본발명의실시예에따른반도체장치는, 기판상에교대로적층되는게이트전극들및 층간절연층들, 게이트전극들및 층간절연층들을관통하는채널영역들, 채널영역들사이에서게이트전극들및 층간절연층들을관통하여상기층간절연층들중 최상층으로부터상기기판까지연장되며외측벽에요철을갖는도전층, 도전층의외측벽상에배치되는스페이서층, 스페이서층의적어도일측면상에배치되는배리어층을포함하고, 스페이서층과배리어층은서로상이한식각선택비를가질수 있다.

Abstract translation: 半导体装置包括交替层叠在基板上的栅极电极和层间绝缘层，穿过栅极电极和层间绝缘层的沟道区域，通过穿过栅极从层间绝缘层中的最上层延伸到基板的导电层 电极和沟道区域之间的层间绝缘层，并且在其外侧壁上具有不均匀图案，设置在外侧壁上的间隔层和设置在间隔层的至少一个侧表面上的阻挡层，其中 间隔层和阻挡层具有不同的蚀刻选择性。

公开(公告)号：KR1020160133626A

公开(公告)日：2016-11-23

申请号：KR1020150066325

申请日：2015-05-12

Applicant: 삼성전자주식회사

Inventor： 송주학 ,  김선경

IPC: H01L27/115

CPC classification number: H01L27/11582 ,  H01L21/764 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5329 ,  H01L27/11556

Abstract: 본발명의실시예에따른반도체장치는, 기판상에교대로적층되는게이트전극들및 층간절연층들, 게이트전극들및 층간절연층들을관통하는채널영역들, 채널영역들사이에서게이트전극들및 층간절연층들을관통하여기판과연결되는도전층, 도전층의상면을덮는절연층, 절연층을관통하여도전층과연결되도록배치되는콘택플러그, 및도전층, 절연층및 콘택플러그에의해정의되는에어갭을포함한다.

Abstract translation: 半导体器件包括交替层叠在基板上的基板，栅极电极和层间绝缘层，穿过栅极电极和层间绝缘层的沟道区域，贯穿栅电极和层间绝缘层的导电层，绝缘层覆盖层 导电层的上表面，穿过绝缘层并连接到导电层的接触插塞和形成在导电层中的气隙。 导电层连接到衬底并在两组通道区域之间延伸。 气隙由接触塞，绝缘层和导电层的内侧壁限定。

公开(公告)号：KR1020140072359A

公开(公告)日：2014-06-13

申请号：KR1020120138889

申请日：2012-12-03

Applicant: 삼성전자주식회사

Inventor： 송주학 ,  윤석중 ,  이현민 ,  이희중

IPC: H01L21/28 ,  H01L21/768

CPC classification number: H01L21/76897 ,  H01L21/7682

Abstract: A semiconductor device and a method for manufacturing the same are provided. The method for manufacturing the semiconductor device comprises: forming a contact mold film on a substrate; and forming a wiring mold film on the contact mold film. Trenches, which are extended in a first direction in the wiring mold film and spaced apart in a second direction perpendicular to the first direction, are formed. Contacts holes which are extended downward from a part of the bottom surface of each trench inside the contact mold film are formed. Wirings and contacts connected to each wiring are formed inside the trenches and the contact holes. Formation of the wirings includes formation of first conductive patterns and second conductive patterns sequentially in the trenches.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件的制造方法包括：在基板上形成接触模膜; 并在接触模膜上形成布线模膜。 形成在布线模具膜中沿着第一方向延伸并且沿与第一方向垂直的第二方向间隔开的沟槽。 形成从接触模膜内的每个沟槽的底面的一部分向下延伸的接触孔。 连接到每个布线的布线和触点形成在沟槽和接触孔内。 布线的形成包括在沟槽中顺序地形成第一导电图案和第二导电图案。

公开(公告)号：KR1020140072358A

公开(公告)日：2014-06-13

申请号：KR1020120138888

申请日：2012-12-03

Applicant: 삼성전자주식회사

Inventor： 송주학 ,  김지용 ,  박우현 ,  신효진 ,  정영진

IPC: H01L21/28 ,  H01L21/768

CPC classification number: H01L21/76897 ,  H01L21/7682

Abstract: A method for manufacturing a semiconductor device is provided. A contact mold film is formed on a substrate, and first holes penetrating the contact mold film are formed. A wiring mold film is formed on the contact mold film to form a first air gap inside of the first holes. Trenches are formed which expose the first holes inside the wiring mold film. After forming the trenches, second holes are formed continuously etching the wiring mold film which is disposed inside of the first holes and defines the first air gap. Wirings and contacts connected to each wiring are formed inside of the trenches and the second holes.

Abstract translation: 提供一种制造半导体器件的方法。 在基板上形成接触模膜，形成贯穿接触模膜的第一孔。 在接触模膜上形成布线模膜，以在第一孔内形成第一气隙。 形成露出布线模具膜内的第一孔的沟槽。 在形成沟槽之后，形成第二孔，连续地蚀刻设置在第一孔内部的布线模膜，并限定第一气隙。 连接到每个布线的布线和触点形成在沟槽和第二孔内部。

公开(公告)号：KR1020140071031A

公开(公告)日：2014-06-11

申请号：KR1020120138886

申请日：2012-12-03

Applicant: 삼성전자주식회사

Inventor： 송주학 ,  김동우 ,  신왕철 ,  양우성

IPC: H01L21/28 ,  H01L21/768

CPC classification number: H01L21/76816

Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device according to the present invention comprises: a contact mold film on a substrate; wirings which are disposed on the contact mold film and are extended in one direction; contacts which are arranged on the contact mold film and are connected to each of the wirings; and spacers disposed between the contact mold film and the contacts. The each of the wirings includes a first portion in contact with the contact mold film and a second portion in contact with the each of the contacts. The wirings include a first wiring and an adjacent second wiring in which a first contact connected to the first wiring and a second contact connected to the second wiring are spaced apart in the one direction. The upper surface of the first contact is lower than the lower surface of the first portion of the second wiring.

Abstract translation: 提供半导体器件及其制造方法。 根据本发明的半导体器件包括：在基板上的接触模制膜; 布置在接触模膜上并沿一个方向延伸的布线; 接触件布置在接触模具膜上并连接到每个布线; 以及设置在接触模具膜和触头之间的间隔物。 每个布线包括与接触模具膜接触的第一部分和与每个触点接触的第二部分。 布线包括第一布线和相邻的第二布线，其中连接到第一布线的第一触点和连接到第二布线的第二触点在一个方向上间隔开。 第一触点的上表面比第二布线的第一部分的下表面低。

公开(公告)号：KR1020130007378A

公开(公告)日：2013-01-18

申请号：KR1020110065692

申请日：2011-07-01

Applicant: 삼성전자주식회사

Inventor： 송주학 ,  윤태환 ,  이진성 ,  양우성

IPC: H01L21/768 ,  H01L21/28

CPC classification number: H01L23/5226 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76897 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PURPOSE: A semiconductor device is provided to reduce capacitance between a plug and wiring by forming a ring type spacer around the plug. CONSTITUTION: A material layer(20) is formed on a semiconductor substrate(10). A first landing pattern(34) and a second landing pattern(38) are formed on the material layer. A bottom insulating layer(40) surrounds the lower sidewall of a plug(84). A spacer(94,98) surrounds the upper sidewall of the plug. A first wiring(153) is formed on the plug, the lower insulating layer and the spacer.

Abstract translation: 目的：提供半导体器件，通过在插头周围形成环形间隔来减小插头和布线之间的电容。 构成：在半导体衬底（10）上形成材料层（20）。 第一着陆图案（34）和第二着陆图案（38）形成在材料层上。 底部绝缘层（40）围绕插头（84）的下侧壁。 间隔物（94,98）围绕塞子的上侧壁。 第一布线（153）形成在插头，下绝缘层和间隔件上。