내장된 스트레인-유도 패턴을 갖는 반도체 소자 및 그 형성 방법
    1.
    发明公开
    내장된 스트레인-유도 패턴을 갖는 반도체 소자 및 그 형성 방법 审中-实审
    具有嵌入式应变诱导图案的半导体器件及其形成方法

    公开(公告)号:KR1020140001306A

    公开(公告)日:2014-01-07

    申请号:KR1020120067999

    申请日:2012-06-25

    Abstract: Arranged on a substrate is an activation area having: an upper surface; a first side; a second side which faces the first side; and a third side which comes in contact with the upper surface, the first side, and the second side. An electrode which covers at least one among the upper surface, the first side, and the second side is formed. A strain-inducing pattern which comes in contact with the third side of the activation area is formed. The third side of the activation area has two or more planes. A first plane of the third side forms an acute angle about the first side and a second plane of the third side forms an acute angle about the second side.

    Abstract translation: 排列在基板上的是具有上表面的活化区域, 第一面 面向第一面的第二面; 以及与上表面,第一侧和第二侧接触的第三侧。 形成覆盖上表面,第一侧和第二面中的至少一个的电极。 形成与激活区域的第三面接触的应变诱导图案。 激活区域的第三面具有两个或更多个平面。 第三侧的第一平面围绕第一侧形成锐角,并且第三侧的第二平面围绕第二侧形成锐角。

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