公开(公告)号：KR101160962B1

公开(公告)日：2012-06-29

申请号：KR1020110040171

申请日：2011-04-28

Applicant: 서강대학교산학협력단

Inventor： 이승훈 ,  구병우 ,  박혜림

IPC: H03M1/12

CPC classification number: H03M1/1245 ,  H03M1/0607 ,  H03M1/361 ,  H03M2201/2216 ,  H03M2201/61 ,  H03M2201/622 ,  H03M2201/643

Abstract: PURPOSE: An ADC(Analog To Digital Converter) for processing wideband variable input signals is provided to adopt all WUXGA(Wide Ultra Extended Graphics Array) resolutions from VGA(Video Graphics Array) by applying a second stage reference voltage selection method to a flash ADC. CONSTITUTION: A SHA(Sample-And-Hold Amplifier)(110) exactly samples values which are suitable for necessary specification by using GBC(Gate-Bootstrapping Circuit). A MDAC(Multiplying Digital-To-Analog Converter)(120) reduces the necessary number of unit capacitors by half since a merged-capacitor switching technique is applied. A FLASH1 ADC(Analog To Digital Converter)(130) and a FLASH2 ADC(140) apply an interpolation method. An on-chip reference current voltage generator(150) processes a broadband variable input signal through one external signal. A clock generator(160) generates non-overlapped two clocks from one reference clock, which is inputted from the outside, in a chip. A digital correction circuit(170) including the clock generator and a divider is integrated with an on-chip.

Abstract translation: 目的：提供用于处理宽带可变输入信号的ADC（模/数转换器），以通过将第二级参考电压选择方法应用于闪存ADC来采用VGA（视频图形阵列）中的所有WUXGA（Wide Ultra Extended Graphics Array） 。 构成：SHA（采样保持放大器）（110）通过使用GBC（栅极引导电路）精确地采样适合于必要规格的值。 使用合并电容切换技术，MDAC（乘法数模转换器）（120）将必需数量的单位电容器减少了一半。 FLASH1 ADC（模数转换器）（130）和FLASH2 ADC（140）应用插值方法。 片上参考电流电压发生器（150）通过一个外部信号处理宽带可变输入信号。 时钟发生器（160）从芯片中从外部输入的一个参考时钟产生非重叠的两个时钟。 包括时钟发生器和分频器的数字校正电路（170）与片上集成。