公开(公告)号：KR1020100077127A

公开(公告)日：2010-07-07

申请号：KR1020097011921

申请日：2008-10-03

Applicant: 스미토모덴키고교가부시키가이샤

Inventor： 시바타,가오루 ,  오카바야시,신지 ,  혼주야스히로 ,  이리쿠라마사토 ,  나카니시후미타케

IPC: H01L21/66 ,  H01L21/20

CPC classification number: G01N21/9505 ,  G01N21/894 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is a semiconductor substrate having a uniform semiconductor film. A semiconductor substrate (1) has one or more but not more than 20 pin holes (3) per one semiconductor substrate (1) having a diameter of 2 inches. Thus, effects of warping value reduction of the semiconductor substrate (1) after semiconductor film formation and dimensional variance reduction after exposure are obtained. It is estimated that such effects are brought by having dislocation on the surface of the semiconductor substrate (1) eliminated by existence of the pin hole (3). The film qualities of the semiconductor film are uniformized, performance of a semiconductor device is uniformized, and the semiconductor substrate (1) is prevented from being broken.

Abstract translation: 提供了具有均匀半导体膜的半导体衬底。 半导体衬底（1）具有每个具有2英寸直径的每个半导体衬底（1）中的一个或多个但不超过20个针孔（3）。 因此，获得半导体成膜后的半导体衬底（1）的翘曲值降低和曝光后的尺寸变化减小的效果。 通过存在针孔（3）而消除半导体衬底（1）的表面上的位错，可以估计出这样的效果。 半导体膜的膜质量均匀化，半导体器件的性能均匀化，并且防止半导体衬底（1）破裂。