中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

9 records (took 0.021 seconds)

    반도체 레이저 소자 및 그 제조 방법
    1.
    发明公开
    반도체 레이저 소자 및 그 제조 방법 失效
    半导体激光器件及其制造方法

    公开(公告)号：KR1020070085251A

    公开(公告)日：2007-08-27

    申请号：KR1020077008334

    申请日：2005-12-06

    Applicant: 스미토모덴키고교가부시키가이샤

    Inventor： 요시모토스스무 ,  마츠바라히데키 ,  사이토우히로히사 ,  미사키다카시 ,  나카니시후미타케 ,  모리히로키

    IPC: H01S5/18

    CPC classification number: H01S5/18 ,  B82Y20/00 ,  G02B6/1225 ,  H01S5/105 ,  H01S5/34333 ,  H01S2301/14 ,  H01S2304/04 ,  H01S2304/12

    Abstract: Disclosed is a semiconductor laser device (1) comprising a substrate (3) having a major surface (3a), a photonic crystal layer (7) which is formed above the substrate (3) along the direction in which the major surface (3a) extends and contains an epitaxial layer (2a) composed of GaN and a low refractive index material (2b) having a refractive index lower than the epitaxial layer (2a), an n-type cladding layer (4) formed on the substrate (3), a p-type cladding layer (6) formed above the substrate (3), an active layer (5) interposed between the n-type cladding layer (4) and the p-type cladding layer (6) which emits light when carriers are injected thereinto, and a GaN layer (12) directly covering the photonic crystal layer (7). The semiconductor laser device can be manufactured without performing fusion bonding.

    Abstract translation: 公开了一种半导体激光装置（1），其包括具有主表面（3a）的基板（3），沿着主表面（3a）的方向形成在基板（3）上方的光子晶体层（7） 延伸并包含由GaN构成的外延层（2a）和折射率低于外延层（2a）的低折射率材料（2b），形成在基板（3）上的n型覆层（4） ，形成在所述基板（3）上方的p型覆层（6），插入在所述n型覆盖层（4）与所述p型覆盖层（6）之间的有源层（5），所述p型覆盖层在载体 以及直接覆盖光子晶体层（7）的GaN层（12）。 可以在不进行熔接的情况下制造半导体激光装置。

    양자 우물 구조의 형성 방법 및 반도체 발광 소자의 제조 방법
    4.
    发明公开
    양자 우물 구조의 형성 방법 및 반도체 발광 소자의 제조 방법 无效
    形成量子阱结构的方法及制造半导体发光元件的方法

    公开(公告)号：KR1020090107928A

    公开(公告)日：2009-10-14

    申请号：KR1020090027710

    申请日：2009-03-31

    Applicant: 스미토모덴키고교가부시키가이샤

    Inventor： 엔야요헤이 ,  요시즈미유스케 ,  우에노마사키 ,  나카니시후미타케

    IPC: H01L33/06

    Abstract: PURPOSE: A method for forming a quantum well structure is provided to obtain In composition of thin thickness although a well layer having high In concentration is grown. CONSTITUTION: A quantum well structure is formed by alternately growing a barrier and a well layer on an inclined main surface about a GaN substrate(S103b). A well layer is formed by growing III group nitride semiconductor having In and different III group element. A growing temperature of the barrier is a first temperature. A growing temperature of the well layer is a second temperature lower than the first temperature. When growing the well layer, a source gas of In is supplied before a source gas of the different III group element is supplied.

    Abstract translation: 目的：提供用于形成量子阱结构的方法，以获得具有薄的厚度的In组成，尽管生长了具有高In浓度的阱层。 构成：通过在GaN衬底的倾斜主表面上交替地生长势垒层和阱层来形成量子阱结构（S103b）。 通过生长具有In和III族元素的III族氮化物半导体形成阱层。 屏障的生长温度是第一个温度。 井层的生长温度是比第一温度低的第二温度。 当生长阱层时，在提供不同III族元素的源气体之前，提供In的源气体。

    면발광 레이저 소자 및 그 제조 방법, 및 면발광 레이저 어레이 및 그 제조 방법
    6.
    发明公开
    면발광 레이저 소자 및 그 제조 방법, 및 면발광 레이저 어레이 및 그 제조 방법 无效
    表面发射激光元件及其制造方法和表面发射激光阵列及其制造方法

    公开(公告)号：KR1020090038028A

    公开(公告)日：2009-04-17

    申请号：KR1020097004358

    申请日：2007-05-21

    Applicant: 스미토모덴키고교가부시키가이샤

    Inventor： 마츠바라히데키 ,  사이토히로히사 ,  나카니시후미타케 ,  마츠카와신지

    IPC: H01S5/18 ,  H01S5/183 ,  H01S5/323

    CPC classification number: H01S5/18369 ,  B82Y20/00 ,  H01S5/0206 ,  H01S5/0215 ,  H01S5/105 ,  H01S5/18308 ,  H01S5/18341 ,  H01S5/3202 ,  H01S5/34333 ,  H01S5/423 ,  H01S2301/173

    Abstract: A method for manufacturing a surface emitting laser element (1) comprises a step of preparing conductive GaN composite region substrate including a high-dislocation density high-conductivity region (10a), a low-dislocation density high-conductivity region (10b), and low-dislocation density low-conductivity region (10c) as a conductive GaN substrate (10), a semiconductor layer multilayer-body fabricating step of fabricating III-V group compound semiconductor layer multilayer bodies (20) including a light-emitting layer (200) on the substrate, and an electrode forming step of forming a semiconductor-side electrode (15) and a substrate-side electrode (11). The method is characterized in that the semiconductor layer and the electrodes are so formed that the light-emitting region (200a) which is formed in the light-emitting layer (200) and into which carriers flows is in the upper portion of the low-dislocation density high-conductivity region (10b). Thus, a surface emitting laser element where light emission from the light-emitting region is uniform can be produced with high production yield.

    Abstract translation: 一种制造表面发射激光器元件（1）的方法包括制备包括高位错密度高导电性区域（10a），低位错密度高导电性区域（10b）的导电性GaN复合区域基板的工序，以及 作为导电性GaN衬底（10）的低位错密度低导电区域（10c），制造包括发光层（200）的III-V族化合物半导体层多层体（20）的半导体层多层体制造工序 ）和形成半导体侧电极（15）和基板侧电极（11）的电极形成工序。 该方法的特征在于，形成半导体层和电极，使得形成在发光层（200）中并且载流子流入的发光区域（200a）位于低通滤波器的上部， 位错密度高导电区域（10b）。 因此，能够以高的制造成品生产发光区域的发光均匀的表面发射激光元件。

    반도체 기판, 반도체 기판의 검사 방법
    8.
    发明公开
    반도체 기판, 반도체 기판의 검사 방법 无效
    半导体衬底和用于检查半导体衬底的方法

    公开(公告)号：KR1020100077127A

    公开(公告)日：2010-07-07

    申请号：KR1020097011921

    申请日：2008-10-03

    Applicant: 스미토모덴키고교가부시키가이샤

    Inventor： 시바타,가오루 ,  오카바야시,신지 ,  혼주야스히로 ,  이리쿠라마사토 ,  나카니시후미타케

    IPC: H01L21/66 ,  H01L21/20

    CPC classification number: G01N21/9505 ,  G01N21/894 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Provided is a semiconductor substrate having a uniform semiconductor film. A semiconductor substrate (1) has one or more but not more than 20 pin holes (3) per one semiconductor substrate (1) having a diameter of 2 inches. Thus, effects of warping value reduction of the semiconductor substrate (1) after semiconductor film formation and dimensional variance reduction after exposure are obtained. It is estimated that such effects are brought by having dislocation on the surface of the semiconductor substrate (1) eliminated by existence of the pin hole (3). The film qualities of the semiconductor film are uniformized, performance of a semiconductor device is uniformized, and the semiconductor substrate (1) is prevented from being broken.

    Abstract translation: 提供了具有均匀半导体膜的半导体衬底。 半导体衬底（1）具有每个具有2英寸直径的每个半导体衬底（1）中的一个或多个但不超过20个针孔（3）。 因此，获得半导体成膜后的半导体衬底（1）的翘曲值降低和曝光后的尺寸变化减小的效果。 通过存在针孔（3）而消除半导体衬底（1）的表面上的位错，可以估计出这样的效果。 半导体膜的膜质量均匀化，半导体器件的性能均匀化，并且防止半导体衬底（1）破裂。

    ＧａＮ 기판의 제조 방법, 에피택셜 웨이퍼의 제조 방법, 반도체 소자의 제조 방법 및 에피택셜 웨이퍼
    9.
    发明公开
    ＧａＮ 기판의 제조 방법, 에피택셜 웨이퍼의 제조 방법, 반도체 소자의 제조 방법 및 에피택셜 웨이퍼 无效
    制造基板的方法，制造外延片的方法，制造半导体器件和外延器件的方法

    公开(公告)号：KR1020090035451A

    公开(公告)日：2009-04-09

    申请号：KR1020080097152

    申请日：2008-10-02

    Applicant: 스미토모덴키고교가부시키가이샤

    Inventor： 나카니시후미타케 ,  미우라요시키

    IPC: H01L33/12 ,  H01L33/02

    Abstract: A method of manufacturing a GaN substrate, method of manufacturing an epitaxial wafer is provided to improve a manufacturing process by laminating an AlxGa(1-x)N layer and a GaN layer. An epitaxial wafer(20) comprises a GaN substrate(10), an AlxGa(1-x) N layer(21), and a GaN layer(22). The GaN substrate has a c side, and the AlxGa(1-x) N layer is formed the c of the GaN substrate. The GaN layer is formed on the AlxGa(1-x) N layer. The thickness of the GaN substrate is over 100um and less than 250 um, and the twist of the epitaxial wafer is over 2um and less than 85. The composition of x of Al of the AlxGa(1-x) N layer is over 0 and lees than 0.3. The thickness of the AlxGa(1-x) N layer is over 0 nm and less than 30nm.

    Abstract translation: 提供制造GaN衬底的方法，制造外延晶片的方法，以通过层叠Al x Ga（1-x）N层和GaN层来改善制造工艺。 外延晶片（20）包括GaN衬底（10），Al x Ga（1-x）N层（21）和GaN层（22）。 GaN衬底具有c侧，并且Al x Ga（1-x）N层形成为GaN衬底的c。 GaN层形成在Al x Ga（1-x）N层上。 GaN衬底的厚度超过100um且小于250μm，并且外延晶片的扭曲大于2um且小于85.Al x Ga（1-x）N层的Al的x的组成超过0，并且 酒糟比0.3。 Al x Ga（1-x）N层的厚度超过0nm且小于30nm。

Patent Agency Ranking