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公开(公告)号:KR100401416B1
公开(公告)日:2003-10-17
申请号:KR1020010009078
申请日:2001-02-22
Applicant: 재단법인서울대학교산학협력재단
IPC: H01L29/78
Abstract: PURPOSE: A field effect transistor and a method for fabricating the same are provided to use a shallow electronic layer excited by a field effect as a source/drain region. CONSTITUTION: A gate insulating layer(2) is formed on a semiconductor substrate(1) by growing an oxide layer. A side gate material layer is formed by depositing and doping a polysilicon on the gate insulating layer(2). The side gate material layer is patterned. A source/drain diffusion layer(4) is formed by implanting ions into the semiconductor substrate(1). A silicon nitride layer(5) is deposited on the patterned side gate material layer. A silicon oxide layer is formed on the side gate material layer and the silicon nitride layer(5). A silicon oxide layer sidewall(6) is formed by etching the silicon oxide layer. A couple of side gate(3) is formed by etching a side gate material layer. A main gate(7) is formed by depositing and doping the polysilicon.
Abstract translation: 目的:提供一种场效应晶体管及其制造方法,以使用由场效应激发的浅电子层作为源极/漏极区域。 构成:通过生长氧化物层在半导体衬底(1)上形成栅极绝缘层(2)。 通过在栅极绝缘层(2)上沉积和掺杂多晶硅来形成侧栅极材料层。 侧栅材料层被图案化。 通过将离子注入到半导体衬底(1)中形成源极/漏极扩散层(4)。 氮化硅层(5)沉积在图案化的侧栅极材料层上。 在侧栅极材料层和氮化硅层(5)上形成氧化硅层。 通过刻蚀氧化硅层形成氧化硅层侧壁(6)。 通过蚀刻侧栅极材料层形成一对侧栅极(3)。 主栅极(7)通过沉积和掺杂多晶硅形成。
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公开(公告)号:KR1020020068801A
公开(公告)日:2002-08-28
申请号:KR1020010009078
申请日:2001-02-22
Applicant: 재단법인서울대학교산학협력재단
IPC: H01L29/78
Abstract: PURPOSE: A field effect transistor and a method for fabricating the same are provided to use a shallow electronic layer excited by a field effect as a source/drain region. CONSTITUTION: A gate insulating layer(2) is formed on a semiconductor substrate(1) by growing an oxide layer. A side gate material layer is formed by depositing and doping a polysilicon on the gate insulating layer(2). The side gate material layer is patterned. A source/drain diffusion layer(4) is formed by implanting ions into the semiconductor substrate(1). A silicon nitride layer(5) is deposited on the patterned side gate material layer. A silicon oxide layer is formed on the side gate material layer and the silicon nitride layer(5). A silicon oxide layer sidewall(6) is formed by etching the silicon oxide layer. A couple of side gate(3) is formed by etching a side gate material layer. A main gate(7) is formed by depositing and doping the polysilicon.
Abstract translation: 目的:提供场效应晶体管及其制造方法,以使用由场效应激发的浅电子层作为源/漏区。 构成:通过生长氧化物层,在半导体衬底(1)上形成栅绝缘层(2)。 通过在栅极绝缘层(2)上沉积和掺杂多晶硅来形成侧栅极材料层。 侧栅材料层被图案化。 源极/漏极扩散层(4)通过将离子注入到半导体衬底(1)中而形成。 在图案化的侧栅极材料层上沉积氮化硅层(5)。 在侧栅材料层和氮化硅层(5)上形成氧化硅层。 通过蚀刻氧化硅层形成氧化硅层侧壁(6)。 通过蚀刻侧栅材料层形成一对侧栅(3)。 通过沉积和掺杂多晶硅形成主栅极(7)。
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