公开(公告)号：KR1019910012951A

公开(公告)日：1991-08-08

申请号：KR1019890019313

申请日：1989-12-22

Applicant: 한국전자통신연구원

Inventor： 박병관 ,  강경용 ,  심원 ,  기안도 ,  윤남석 ,  윤용호 ,  박승규 ,  오길록

IPC: G06F13/14

Abstract: 내용 없음.

公开(公告)号：KR100064269B1

公开(公告)日：1993-08-10

申请号：KR1019890019313

申请日：1989-12-22

Applicant: 한국전자통신연구원

Inventor： 박병관 ,  강경용 ,  심원 ,  기안도 ,  윤남석 ,  윤용호 ,  박승규 ,  오길록

IPC: G06F13/14

公开(公告)号：KR1019930003993B1

公开(公告)日：1993-05-19

申请号：KR1019890019313

申请日：1989-12-22

Applicant: 한국전자통신연구원

Inventor： 박병관 ,  강경용 ,  심원 ,  기안도 ,  윤남석 ,  윤용호 ,  박승규 ,  오길록

IPC: G06F13/14

Abstract: The method transmits data smoothly through data bus by monopolizing the bus only in memory consulting operation of a processor and the related memory. It comprises the three stages: in the 1st stage a processor drives a certain address on address bus during a certain period of a bus clock; in the 2nd stage the memory selected by the certain address stores the certain address during the certain bus clock; and in the 3rd stage when the process of storing is completed, the processor cancells the occupation of the address bus the make other processor use the address bus.

Abstract translation: 该方法仅在处理器和相关存储器的存储器咨询操作中通过垄断总线通过数据总线平滑地传输数据。 它包括三个阶段：在第一阶段，一个处理器在总线时钟的一定时间段内在地址总线上驱动某个地址; 在第二阶段，特定地址选择的存储器在特定的总线时钟存储特定地址; 并且在存储过程完成的第三阶段中，处理器取消对其他处理器使用地址总线的占用地址总线。