公开(公告)号：KR100898776B1

公开(公告)日：2009-05-27

申请号：KR1020080134512

申请日：2008-12-26

Applicant: 주식회사 파이칩스 ,  한국정보통신대학교 산학협력단

Inventor： 김은희 ,  고진호 ,  유형준

IPC: H04B1/04

CPC classification number: H04B1/04 ,  H04B2001/0491

Abstract: 본 발명의 일 실시예에 따른 디지털-RF 변환 송신기는, 복수 비트의 디지털 신호를 입력받아 상기 디지털 신호에 상응하는 아날로그 RF 신호를 출력하는 디지털-RF(Radio frequency) 변환 송신기로서, 상기 비트가 각각 입력되는 복수의 서브블록; 및 출력부를 포함한다. 여기서, 상기 각 서브블록은, 서로 동일한 전류값을 가지는 복수개의 전류원 및 상기 각 서브블록으로 입력되는 상기 각 비트가 일정 시간만큼 지연된 신호에 따라 상기 전류원 각각의 온오프를 제어하는 복수개의 스위치를 포함한다. 서로 다른 상기 서브블록에 속하는 상기 전류원은 서로 다른 전류값을 가지고, 상기 출력부는 상기 서브블록 전부에 포함된 모든 온상태의 전류원의 전류값을 합하여 출력한다.
송신기, RF 전류, 단위시간지연상수, FIR(Finite Impulse Response), PSF(Pulse Shaping Filter)

公开(公告)号：KR1020090056789A

公开(公告)日：2009-06-03

申请号：KR1020080064462

申请日：2008-07-03

Applicant: 한국전자통신연구원 ,  한국정보통신대학교 산학협력단

Inventor： 김창선 ,  김무성 ,  윤병진 ,  홍은표 ,  유형준

IPC: H03F1/26

CPC classification number: H03F1/26 ,  H03F1/223 ,  H03F1/347 ,  H03F3/191 ,  H03F2200/294

Abstract: A multi band low noise amplifier is provided to reduce a value of a passive device for input terminal matching in a low frequency band by sharing the passive device of the input terminal matching circuit. A first matching circuit(110) performs the impedance matching of the input terminal in a low frequency region. A first transistor includes a gate connected to a first matching circuit and a drain connected to an output terminal, and performs the amplification operation of the low frequency input. A first degeneration inductor is connected between the ground and the source of the first transistor. A second matching circuit(120) performs the impedance matching of the input terminal in a high frequency region. A second transistor includes the gate connected to the second matching circuit and the drain connected to the output terminal, and performs the amplification operation of the high frequency input. A second degeneration inductor is connected between the ground and the source of the second transistor.

Abstract translation: 提供一种多频带低噪声放大器，通过共享输入端子匹配电路的无源器件来降低用于低频带中的输入端子匹配的无源器件的值。 第一匹配电路（110）在低频区域中执行输入端子的阻抗匹配。 第一晶体管包括连接到第一匹配电路的栅极和连接到输出端子的漏极，并且执行低频输入的放大操作。 第一退化电感器连接在第一晶体管的接地和源极之间。 第二匹配电路（120）在高频区域中执行输入端子的阻抗匹配。 第二晶体管包括连接到第二匹配电路的栅极和连接到输出端子的漏极，并且执行高频输入的放大操作。 第二退化电感器连接在第二晶体管的接地和源极之间。

公开(公告)号：KR100884159B1

公开(公告)日：2009-02-17

申请号：KR1020070106070

申请日：2007-10-22

Applicant: 한국정보통신대학교 산학협력단

Inventor： 유상선 ,  유형준

IPC: H03H11/28

CPC classification number: H03H7/38 ,  H03F1/26 ,  H03H7/40 ,  H03H11/28

Abstract: A multiband impedance matching circuit using a self-matched capacitor is provided to optimize the performance of an RF(Radio Frequency) circuit by matching the impedance and the noise in various frequency bands. A matching device receives an external signal and matches the input impedance. A DC prevention device is connected to an output terminal of the matching device in series and blocks the DC signal. An input transistor amplifies an external signal transmitted through the DC prevention capacitor. A gate inductor is connected between the DC prevention capacitor and the gate terminal of the input transistor and matches the input impedance. A source inductor is connected between the source terminal of the input transistor and the external ground voltage and matches the input impedance. A self-matched capacitor is connected between the source terminal of the input transistor and the output terminal of the DC prevention capacitor and maintains the constant impedance in various frequency bands.

Abstract translation: 提供使用自匹配电容器的多频带阻抗匹配电路，通过匹配各种频带中的阻抗和噪声来优化RF（射频）电路的性能。 匹配装置接收外部信号并匹配输入阻抗。 DC防止装置串联连接到匹配装置的输出端子，并且阻断DC信号。 输入晶体管放大通过直流防止电容器传输的外部信号。 在直流防护电容器和输入晶体管的栅极端子之间连接有栅极电感器，并匹配输入阻抗。 源电感连接在输入晶体管的源极端子和外部接地电压之间，并匹配输入阻抗。 在输入晶体管的源极端子和直流防止电容器的输出端子之间连接有自匹配电容器，并且在各种频带中保持恒定的阻抗。

公开(公告)号：KR100884114B1

公开(公告)日：2009-02-17

申请号：KR1020070106712

申请日：2007-10-23

Applicant: 한국정보통신대학교 산학협력단

Inventor： 김철회 ,  서민우 ,  유형준

IPC: H03B5/12

CPC classification number: H03B27/00 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1246 ,  H03B2200/0078

Abstract: A quadrature voltage controlled oscillator with low power and low phase noise characteristic is provided to reduce a phase noise and a flicker noise by using a filer inductor. A quadrature voltage controlled oscillator includes a first delay cell(200) and a second delay cell(300). The first delay cell outputs a first in-phase signal and a second in-phase signal. The second delay cell outputs a first orthogonal phase signal and a second orthogonal phase signal. The first and second delay cells include a resonance circuit(100), first and second complementary transistors(M1,M2), third and fourth complementary transistors(M3,M4), and fifth and sixth transistors(M5,M6) and a filter inductor. The resonance circuit corresponds to the control voltage and controls the frequency of the oscillation signal. The first and second transistors are connected to the one electrode of the resonance circuit in series and maintain the oscillation signal. The third and fourth transistors are connected to the other electrode of the resonance circuit in series and maintain the oscillation signal. The fifth and sixth transistors are connected between the first and second transistors and the power terminal in series and generate the orthogonal phase. The filter inductor is connected between the third and fourth transistors and the ground terminal and reduces the phase noise.

Abstract translation: 提供具有低功耗和低相位噪声特性的正交压控振荡器，以通过使用滤波电感来减少相位噪声和闪烁噪声。 正交压控振荡器包括第一延迟单元（200）和第二延迟单元（300）。 第一延迟单元输出第一同相信号和第二同相信号。 第二延迟单元输出第一正交相位信号和第二正交相位信号。 第一和第二延迟单元包括谐振电路（100），第一和第二互补晶体管（M1，M2），第三和第四互补晶体管（M3，M4）以及第五和第六晶体管（M5，M6）和滤波电感器 。 谐振电路对应于控制电压并控制振荡信号的频率。 第一和第二晶体管串联连接到谐振电路的一个电极并保持振荡信号。 第三和第四晶体管串联连接到谐振电路的另一个电极并保持振荡信号。 第五和第六晶体管串联连接在第一和第二晶体管与电源端子之间，并产生正交相位。 滤波电感连接在第三和第四晶体管与接地端子之间，并降低相位噪声。