公开(公告)号：WO2016176418A1

公开(公告)日：2016-11-03

申请号：PCT/US2016/029720

申请日：2016-04-28

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： JONCZYK, Ralf ,  WALLACE, Richard, L. ,  HARVEY, David, S.

IPC: C30B15/10 ,  C30B15/12 ,  C30B15/20 ,  C30B28/10 ,  C30B28/06 ,  C30B29/08

CPC classification number: C30B35/007 ,  C30B11/08 ,  C30B15/10 ,  C30B28/06 ,  C30B29/06 ,  C30B29/08 ,  C30B35/002

Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90°C, and even as small as 50°C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100°C.

Abstract translation: 熔融半导体的主坩埚从供应坩埚中补充，供应坩埚保持在供应坩埚内始终存在两相的固体和液体半导体。 加入固体材料熔化的热量导致固体物质相变为液体，但不会导致供应坩埚内的液体的温度升高。 温度偏移有利地是小的，小于会导致形成的产品的问题的偏移。 固体产品材料作为一种温度缓冲液，以自动和被动地维持供应液体温度或非常接近相变温度。 对于硅，偏移保持在小于90℃，甚至低至50℃。 这些方法也适用于锗。 完全熔化半导体的现有技术的硅方法体验超过100℃的偏移。

公开(公告)号：WO2010080822A1

公开(公告)日：2010-07-15

申请号：PCT/US2010/020245

申请日：2010-01-06

Applicant: 1366 TECHNOLOGIES INC. ,  SACHS, Emanuel, M. ,  WALLACE, Richard, L. ,  BREDT, James, F. ,  POLITO, Benjamin, F. ,  ERSEN, Ali

Inventor： SACHS, Emanuel, M. ,  WALLACE, Richard, L. ,  BREDT, James, F. ,  POLITO, Benjamin, F. ,  ERSEN, Ali

IPC: H01L31/00

CPC classification number: H01L31/022425 ,  H01L21/6715 ,  Y02E10/50

Abstract: Materials that contain liquid are deposited into grooves upon a surface of a work piece, such as a silicon wafer to form a solar cell. Liquid can be dispensed into work piece paths, such as grooves under pressure through a dispensing tube. The tube mechanically tracks in the groove. The tube may be small and rest at the groove bottom, with the sidewalls providing restraint. Or it may be larger and ride on the top edges of the groove. A tracking feature, such as a protrusion, Non-circular cross-sections, molded-on protrusions and lobes also enhance tracking. The tube may be forced against the groove by spring or magnetic loading. Alignment guides, such as lead-in features may guide the tube into the groove. Restoring features along the path may restore a wayward tube. Many tubes may be used. Many work pieces can be treated in a line or on a drum.

Abstract translation: 含有液体的材料沉积在诸如硅晶片的工件的表面上的凹槽中，以形成太阳能电池。 液体可以分配到工件路径中，例如通过分配管的压力下的槽。 管子在凹槽中机械地跟踪。 管可以小并且在槽底部搁置，其中侧壁提供约束。 或者它可能更大并且骑在凹槽的顶部边缘上。 跟踪特征，例如突起，非圆形横截面，模制突起和凸角也增强跟踪。 管可以通过弹簧或磁负载而被迫力抵靠凹槽。 诸如引入特征的对准引导件可以将管引导到凹槽中。 沿着路径还原功能可能会恢复一个顺从的管。 可以使用许多管。 许多工件可以在一条线或一个鼓上进行处理。

公开(公告)号：WO2009145857A1

公开(公告)日：2009-12-03

申请号：PCT/US2009/002422

申请日：2009-04-17

Applicant: 1366 TECHNOLOGIES INC. ,  GABOR, Andrew, M ,  WALLACE, Richard, L.

Inventor： GABOR, Andrew, M ,  WALLACE, Richard, L.

IPC: H01L31/00

CPC classification number: H01L31/1804 ,  H01L21/228 ,  H01L21/6715 ,  H01L31/022425 ,  H01L31/0288 ,  Y02E10/547 ,  Y02P70/521

Abstract: Methods exploiting a Self Aligned Cell (SAC) architecture for doping purposes, use the architecture to direct the deposition and application of either a dopant or a diffusion retarder. Doping is provided in regions that will become metallization for conducting fingers. Dopant may be treated directly into metallization grooves. Or, diffusion retarder may be provided in non-groove locations, and dopant may be provided over some or all of the entire wafer surface. Dopant and metal automatically go where desired, and in register with each other. The SAC architecture also includes concave surfaces for light absorbing regions of a cell, to reduce reflection of light energy, which regions may also be treated with dopant in the concavities, to result in semiconductor emitter lines. Alternatively, diffusion retarder may be treated into the concavities, leaving upper tips of ridges between the concavities exposed, thereby subject to deeper doping.

Abstract translation: 利用自对准单元（SAC）架构进行掺杂的方法，使用该架构来指导掺杂剂或扩散延迟器的沉积和应用。 在将成为导电手指的金属化的区域中提供掺杂。 掺杂剂可以直接处理成金属化槽。 或者，扩散延迟器可以设置在非凹槽位置，并且可以在整个晶片表面的一些或全部上提供掺杂剂。 掺杂剂和金属自动进入需要的地方，并相互注册。 SAC架构还包括用于单元的光吸收区域的凹面，以减少光能的反射，哪些区域也可以在凹部中用掺杂剂处理，以产生半导体发射线。 或者，扩散延迟器可以被处理成凹面，从而使暴露的凹部之间的脊的上部尖端留下更深的掺杂。

公开(公告)号：WO2015167826A1

公开(公告)日：2015-11-05

申请号：PCT/US2015/026389

申请日：2015-04-17

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： SACHS, Emanuel, M. ,  JONCZYK, Ralf ,  LORENZ, Adam, L. ,  WALLACE, Richard, L. ,  HUDELSON, Stephen George, D.

IPC: H01L31/0236

CPC classification number: C30B11/02 ,  C30B29/06 ,  H01L29/0657 ,  H01L31/022441 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/0682 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: Semi-conductor wafers with thin and thicker regions at controlled locations may be for Photovoltaics. The interior may be less than 180 microns or thinner, to 50 microns, with a thicker portion, at 180 - 250 microns. Thin wafers have higher efficiency. A thicker perimeter provides handling strength. Thicker stripes, landings and islands are for metallization coupling. Wafers may be made directly from a melt upon a template with regions of different heat extraction propensity arranged to correspond to locations of relative thicknesses. Interstitial oxygen is less than 6 x 10 17 atoms/cc, preferably less than 2 x 10 17 , total oxygen less than 8. 75 x 10 17 atoms/cc, preferably less than 5. 25 x 10 17 . Thicker regions form adjacent template regions having relatively higher heat extraction propensity; thinner regions adjacent regions with lesser extraction propensity. Thicker template regions have higher extraction propensity. Functional materials upon the template also have differing extraction propensities.

Abstract translation: 半导体晶片在受控位置具有较薄和较厚的区域可能适用于光伏发电。 内部可以小于180微米或更薄，至50微米，较厚部分为180-250微米。 薄晶圆具有更高的效率。 较厚的周长提供处理强度。 较厚的条纹，着陆和岛屿用于金属化耦合。 晶片可以直接从熔体制成模板，其中不同热提取倾向的区域布置成对应于相对厚度的位置。 间隙氧小于6×1017原子/立方厘米，优选小于2×1017，小于8.75×10 17原子/立方厘米，优选小于5.25×1017的总氧。较大的区域形成相对较高的相邻模板区域 热提取倾向; 较薄的区域具有较小的提取倾向。 较厚的模板区域具有较高的提取倾向。 模板上的功能材料也具有不同的提取倾向。

公开(公告)号：WO2010104838A1

公开(公告)日：2010-09-16

申请号：PCT/US2010/026639

申请日：2010-03-09

Applicant: 1366 TECHNOLOGIES INC. ,  SACHS, Emanuel, M. ,  WALLACE, Richard, L. ,  HANTSOO, Eerik, T. ,  LORENZ, Adam, M. ,  HUDELSON, G. D., Stephen ,  JONCZYK, Ralf

Inventor： SACHS, Emanuel, M. ,  WALLACE, Richard, L. ,  HANTSOO, Eerik, T. ,  LORENZ, Adam, M. ,  HUDELSON, G. D., Stephen ,  JONCZYK, Ralf

IPC: C30B15/00 ,  C03B19/02

CPC classification number: B29C33/44 ,  C30B11/007 ,  C30B15/30 ,  C30B19/068 ,  C30B28/04 ,  C30B29/06

Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.

Abstract translation: 在模板上施加压差，并在其上形成半导体（例如硅）晶片。 压差的放松允许晶片的释放。 模具片可以比熔体更冷。 几乎完全通过成形晶片的厚度提取热量。 液体和固体界面基本上平行于模片。 凝固体的温度在其宽度上基本均匀，导致低应力和位错密度和更高的晶体学质量。 模板必须允许气体流过它。 可以通过以下方式将熔体引入片材：与熔体的顶部完全区域接触; 穿过熔体与模板的部分区域接触，无论是水平还是垂直的，或者在其间; 并将模具浸入熔体中。 可以通过许多方法控制晶粒尺寸。

公开(公告)号：EP2279526A1

公开(公告)日：2011-02-02

申请号：EP09755220.2

申请日：2009-04-17

Applicant: 1366 Technologies Inc.

Inventor： GABOR, Andrew, M ,  WALLACE, Richard, L.

IPC: H01L31/00

CPC classification number: H01L31/1804 ,  H01L21/228 ,  H01L21/6715 ,  H01L31/022425 ,  H01L31/0288 ,  Y02E10/547 ,  Y02P70/521

Abstract: Methods exploiting a Self Aligned Cell (SAC) architecture for doping purposes, use the architecture to direct the deposition and application of either a dopant or a diffusion retarder. Doping is provided in regions that will become metallization for conducting fingers. Dopant may be treated directly into metallization grooves. Or, diffusion retarder may be provided in non-groove locations, and dopant may be provided over some or all of the entire wafer surface. Dopant and metal automatically go where desired, and in register with each other. The SAC architecture also includes concave surfaces for light absorbing regions of a cell, to reduce reflection of light energy, which regions may also be treated with dopant in the concavities, to result in semiconductor emitter lines. Alternatively, diffusion retarder may be treated into the concavities, leaving upper tips of ridges between the concavities exposed, thereby subject to deeper doping.

公开(公告)号：EP3289116A1

公开(公告)日：2018-03-07

申请号：EP16787126.8

申请日：2016-04-28

Applicant: 1366 Technologies Inc.

Inventor： JONCZYK, Ralf ,  WALLACE, Richard, L. ,  HARVEY, David, S.

IPC: C30B15/10 ,  C30B15/12 ,  C30B15/20 ,  C30B28/10 ,  C30B28/06 ,  C30B29/08

CPC classification number: C30B35/007 ,  C30B11/08 ,  C30B15/10 ,  C30B29/06 ,  C30B29/08 ,  C30B35/002

Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90° C., and even as small as 50° C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100° C.

公开(公告)号：EP2386118A1

公开(公告)日：2011-11-16

申请号：EP10729457.1

申请日：2010-01-06

Applicant: 1366 Technologies Inc.

Inventor： SACHS, Emanuel, M. ,  WALLACE, Richard, L. ,  BREDT, James, F. ,  POLITO, Benjamin, F. ,  ERSEN, Ali

IPC: H01L31/00

CPC classification number: H01L31/022425 ,  H01L21/6715 ,  Y02E10/50

Abstract: Materials that contain liquid are deposited into grooves upon a surface of a work piece, such as a silicon wafer to form a solar cell. Liquid can be dispensed into work piece paths, such as grooves under pressure through a dispensing tube. The tube mechanically tracks in the groove. The tube may be small and rest at the groove bottom, with the sidewalls providing restraint. Or it may be larger and ride on the top edges of the groove. A tracking feature, such as a protrusion, Non-circular cross-sections, molded-on protrusions and lobes also enhance tracking. The tube may be forced against the groove by spring or magnetic loading. Alignment guides, such as lead-in features may guide the tube into the groove. Restoring features along the path may restore a wayward tube. Many tubes may be used. Many work pieces can be treated in a line or on a drum.

公开(公告)号：EP2406413B1

公开(公告)日：2018-05-30

申请号：EP10751275.8

申请日：2010-03-09

Applicant: 1366 Technologies Inc.

Inventor： SACHS, Emanuel, M. ,  WALLACE, Richard, L. ,  HANTSOO, Eerik, T. ,  LORENZ, Adam, M. ,  HUDELSON, G. D., Stephen ,  JONCZYK, Ralf

IPC: B29C33/44 ,  C03B19/02 ,  C30B19/06 ,  C30B29/06 ,  H01L21/02 ,  H01L31/18 ,  C30B15/30 ,  C30B11/00 ,  C30B28/04

CPC classification number: B29C33/44 ,  C30B11/007 ,  C30B15/30 ,  C30B19/068 ,  C30B28/04 ,  C30B29/06

Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.

公开(公告)号：EP2406413A1

公开(公告)日：2012-01-18

申请号：EP10751275.8

申请日：2010-03-09

Applicant: 1366 Technologies Inc.

Inventor： SACHS, Emanuel, M. ,  WALLACE, Richard, L. ,  HANTSOO, Eerik, T. ,  LORENZ, Adam, M. ,  HUDELSON, G. D., Stephen ,  JONCZYK, Ralf

IPC: C30B15/00 ,  C03B19/02

CPC classification number: B29C33/44 ,  C30B11/007 ,  C30B15/30 ,  C30B19/068 ,  C30B28/04 ,  C30B29/06

Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.