Abstract:
Bei einer elektronischen Schaltung, umfassend eine Ansteuereinheit (20), welche mindestens ein Ansteuersignal erzeugt, zwei oder mehrere durch das Ansteuersignal synchron schaltbare Leistungshalbleiterschalter (T 1 , T 2 , T 3 ) mit je einem ersten und einem zweiten Hauptanschluss, wobei die ersten und die zweiten Hauptanschlüsse der Leistungshalbleiterschalter (T 1 , T 2 , T 3 ) jeweils untereinander elektrisch parallel geschaltet sind, für jeden der Leistungshalbleiterschalter (T 1 , T 2 , T 3 ) eine erste und eine zweite elektrisch leitende Verbindung zum Anschluss an die Ansteuereinheit (20), wird eine gleichmässige dynamische Stromaufteilung auf die Leistungshalbleiterschalter (T 1 , T 2 , T 3 ) erfindungsgemäss dadurch erreicht, dass in jeder der ersten elektrisch leitenden Verbindungen eine erste Induktivität vorgesehen ist und in jeder der zweiten elektrisch leitenden Verbindungen eine zweite Induktivität vorgesehen ist, wobei für jeden der Leistungshalbleiterschalter die erste Induktivität mit der zweiten Induktivität gekoppelt ist.
Abstract:
A method for simplifying short circuit failure mode (SCFM) transitions in a power electronics module. The method includes keeping at least one switch (101, 102, 103, 104) in closed position by means of a signal (109) supplied by a gate unit (110). Upon a failure of a first semiconductor chip (105) during which the failed chip enters an SCFM, the switch (102, 103, 104) is opened, wherein the gates of the second semiconductor chips (106, 107, 108) become floating. Thereby the blocking voltage of the semiconductor chips is reduced.
Abstract:
The present invention provides a Power semiconductor module, comprising a baseplate equipped with metallizations that are electrically isolated towards the baseplate; at least one power semiconductor device being arranged on a metallization; a circuit board (12) with at least one circuit component, the circuit board having a connection area for connecting at least one circuit component to a metallization by means of a bond wire (18), wherein the circuit board (12) is mounted spaced apart from at least one power semiconductor device; a frame (16) for supporting the circuit board, and a housing for enclosing the power semiconductor module, wherein the housing is filled with an insulating gel, and wherein at least the connection area is immovably fixed to the frame (16). Such a power semiconductor module may provide a significantly increased resistance against thermocycling effects and may particularly withstand even huge amounts of expansion and contracting cycles of the insulating gel.
Abstract:
Ein Leistungshalbleitermodul umfasst eine Anzahl N parallel zu einer Basisebene angeordneter Leistungshalbleiter-Schaltelemente, von denen jedes eine Anzahl an Schaltelement-Kontakten aufweist, umfassend einen Steuerkontakt, einen ersten Leistungskontakt und einen zweiten Leistungskontakt wobei mittels einer zwischen Steuerkontakt und erstem Leistungskontakt anliegenden Steuerspannung ein Strom zwischen den Leistungskontakten schaltbar ist; eine Kontaktierungsanordnung zur Kontaktierung der Schaltelement-Kontakte, umfassend: ein erstes Verbindungsblech, welches N erste Kontakte aufweist, über welche es elektrisch leitend mit den Steuerkontakten der N Leistungshalbleiter-Schaltelemente verbunden ist, ein zweites Verbindungsblech, welches N zweite Kontakte aufweist, über welche es elektrisch leitend mit den ersten Leistungskontakten der N Leistungshalbleiter-Schaltelemente verbunden ist, ein drittes Verbindungsblech, welches n dritte Kontakte aufweist, über welche es elektrisch leitend mit zweiten Leistungskontakten zumindest einer Teilmenge enthaltend n N der N Leistungshalbleiter-Schaltelemente verbunden ist; und wobei zum Anlegen einer Steuer-Sollspannung zwischen den Steuerkontakten und den ersten Leistungskontakten der Leistungshalbleiter-Schaltelemente ein Referenzanschluss am zweiten Verbindungsblech vorgesehen ist, welcher über die zweiten Kontakte elektrisch leitend mit den ersten Leistungskontakten der N Leistungshalbleiter-Schaltelemente verbunden ist.
Abstract:
A reverse-conducting insulated gate bipolar transistor (RC-IGBT), particularly a bi-mode insulated gate transistor (BIGT), is controlled by responding to an ON command by applying high-level gate voltage for a first period (51 ), during which a current is fed into a connection point, from which it flows either through the RC-IGBT or along a different path. Based hereon, it is determined whether the RC-IGBT conducts in its forward/IGBT or reverse/diode mode, and the RC-IGBT is either driven at high (a) or low (b) gate voltage. Subsequent conduction mode changes may be monitored in the same way, and the gate voltage may be adjusted accordingly (c, d). A special turn-off procedure may be applied in response to an OFF command in cases where the RC- IGBT conducts in the reverse mode, wherein a high-level pulse is applied for a second period (52) before the gate voltage goes down to turn-off level (b, c).
Abstract:
A reverse-conducting insulated gate bipolar transistor, particularly a bi-mode insulated gate transistor, is controlled by responding to an ON command by applying high-level gate voltage for a first period, during which a current is fed into a connection point, from which it flows either through the RC-IGBT or along a different path. Based hereon, it is determined whether the RC-IGBT conducts in its forward/IGBT or reverse/diode mode, and the RC-IGBT is either driven at high or low gate voltage. Subsequent conduction mode changes may be monitored in the same way, and the gate voltage may be adjusted accordingly. A special turn-off procedure may be applied in response to an OFF command in cases where the RC-IGBT conducts in the reverse mode, wherein a high-level pulse is applied for a second period before the gate voltage goes down to turn-off level.
Abstract:
The invention relates to an electronic circuit, comprising a control unit (20), which generates at least one control signal, and two or more power semiconductor switches (T1, T2, T3) each having a first and a second main connection. The first and second main connections of the power semiconductor switches (T1, T2, T3) are electrically connected in parallel to one another. A first and a second electrically conductive connection for connecting to the control unit (20) is provided for each of the power semiconductor switches (T1, T2, T3). The aim of the invention is to achieve an equal dynamic distribution of current to the power semiconductor switches (T1, T2, T3). To this end, a first inductive resistor is provided in each of the first electrically conductive connections, and a second inductive resistor is provided in each of the second electrically conductive connections, whereby for each of the power semiconductor switches, the first inductive resistor is coupled to the second inductive resistor.
Abstract:
The invention relates to an electronic circuit, comprising a control unit (20), which generates at least one control signal, and two or more power semiconductor switches (T1, T2, T3) each having a first and a second main connection. The first and second main connections of the power semiconductor switches (T1, T2, T3) are electrically connected in parallel to one another. A first and a second electrically conductive connection for connecting to the control unit (20) is provided for each of the power semiconductor switches (T1, T2, T3). The aim of the invention is to achieve an equal dynamic distribution of current to the power semiconductor switches (T1, T2, T3). To this end, a first inductive resistor is provided in each of the first electrically conductive connections, and a second inductive resistor is provided in each of the second electrically conductive connections, whereby for each of the power semiconductor switches, the first inductive resistor is coupled to the second inductive resistor.
Abstract:
A reverse-conducting insulated gate bipolar transistor, particularly a bi-mode insulated gate transistor, is controlled by responding to an ON command by applying high-level gate voltage for a first period, during which a current is fed into a connection point, from which it flows either through the RC-IGBT or along a different path. Based hereon, it is determined whether the RC-IGBT conducts in its forward/IGBT or reverse/diode mode, and the RC-IGBT is either driven at high or low gate voltage. Subsequent conduction mode changes may be monitored in the same way, and the gate voltage may be adjusted accordingly. A special turn-off procedure may be applied in response to an OFF command in cases where the RC-IGBT conducts in the reverse mode, wherein a high-level pulse is applied for a second period before the gate voltage goes down to turn-off level.