公开(公告)号：WO2013189756A1

公开(公告)日：2013-12-27

申请号：PCT/EP2013/061735

申请日：2013-06-06

Applicant: ABB TECHNOLOGY AG

Inventor： HARTMANN, Samuel ,  TRÜSSEL, Dominik

IPC: H01L25/07 ,  H01L23/00

CPC classification number: H01L25/072 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/45014 ,  H01L2224/48101 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099

Abstract: The present invention provides a substrate (1) for mounting multiple power transistors (21, 30) thereon, comprising a first metallization (3), on which the power transistors (21, 30) are commonly mountable with their collector or emitter, and which extends in at least one line (5) on the substrate (1), a second metallization (9), which extends in an area (11) next to the at least one line (5) of the first metallization (3), for connection to the remaining ones of the emitters or collectors of the power transistors (21, 30), and a third metallization (13) for connection to gate contact pads (25) of the power transistors (21, 30), whereby the third metallization (13) comprises a gate contact (15) and at least two gate metallization areas (16, 18), which are interconnectable by way of bonding means (19), the gate metallization areas (16, 18) are arranged in parallel to the at least one line (5) and spaced apart in a longitudinal direction of the at least one line (5), and at least one gate metallization area is provided as a gate island (16) surrounded on the substrate (1) by the second metallization (9). The second metallization (9) is adapted for mounting multiple power transistors (21, 30) with their collectors or emitters thereon, whereby the power transistors (21, 30) have the same orientation like the power transistors (21, 30) mounted on the first metallization (3). The substrate (1 ) comprises a fourth metallization (42), which extends in an area (44) next to the second metallization (9), for connection to the remaining ones of the emitters or collectors of the power transistors (21, 30) mountable on the second metallization (9). A fifth metallization (46) is provided for connection to gate contact pads (25) of the power transistors (21, 30) mountable on the second metallization (9), whereby the fifth metallization (46) comprises at least two gate metallization areas (16, 18), which are interconnectable by way of bonding means (19), the gate metallization areas (16, 18) are arranged in parallel to the at least one line (5) and spaced apart in a longitudinal direction of the at least one line (5), and at least one gate metallization area is provided as a gate island (16) surrounded on the substrate (1 ) by the fourth metallization (42).

Abstract translation: 本发明提供了一种用于在其上安装多个功率晶体管（21,30）的衬底（1），其包括第一金属化（3），功率晶体管（21,30）可以共用其集电极或发射极安装在其上， 在衬底（1）上的至少一条线（5）上延伸，第二金属化（9），其在邻近第一金属化（3）的至少一条线（5）的区域（11）中延伸，用于 连接到功率晶体管（21,30）的发射器或集电极的其余部分，以及用于连接到功率晶体管（21,30）的栅极接触焊盘（25）的第三金属化（13），由此第三金属化 （13）包括可通过接合装置（19）互连的至少两个栅极金属化区域（16,18）的栅极接触（15）和栅极金属化区域（16,18），所述栅极金属化区域（16,18）平行于 至少一条线（5），并且在所述至少一条线（5）的纵向方向上间隔开，并且至少一个盖 e金属化区域被设置为通过第二金属化（9）在基板（1）上包围的栅极岛（16）。 第二金属化（9）适于将多个功率晶体管（21,30）与其集电器或发射器安装在其上，由此功率晶体管（21,30）具有与安装在其上的功率晶体管（21,30）相同的取向 第一次金属化（3）。 衬底（1）包括在与第二金属化（9）相邻的区域（44）中延伸的用于连接到功率晶体管（21,30）的其余发射极或集电极的第四金属化层（42） 可安装在第二金属化（9）上。 第五金属化（46）被提供用于连接到可安装在第二金属化（9）上的功率晶体管（21,30）的栅极接触焊盘（25），由此第五金属化（46）包括至少两个栅极金属化区域 16,18），其可通过接合装置（19）互连，所述栅极金属化区域（16,18）平行于所述至少一条线（5）布置并沿所述至少一条线的长度方向间隔开 一个线（5），并且至少一个栅极金属化区域被提供为通过第四金属化（42）围绕在基板（1）上的栅极岛（16）。

公开(公告)号：WO2015039771A1

公开(公告)日：2015-03-26

申请号：PCT/EP2014/058604

申请日：2014-04-28

Applicant: ABB TECHNOLOGY AG

Inventor： SIVASUBRAMANIAM, Venkatesh ,  GUILLON, David ,  TRÜSSEL, Dominik ,  THUT, Markus ,  HARTMANN, Samuel

IPC: B23K20/10 ,  B23K20/26

CPC classification number: B23K1/06 ,  B23K20/10 ,  B23K20/26 ,  B29C35/0261

Abstract: The present invention relates to a method of connecting two components by ultrasonic welding for producing a power semiconductor module, said method comprising the steps of: a) Aligning the components to be welded to form a welding interface (16); b) Aligning a welding tool (18) to the aligned components; c) Removably arranging a trapping material (20) at least partly encompassing the welding interface (16), whereby the trapping material (20) is a foam; and d) Connecting the components by activating the welding tool (18). The method like described above provides an easy and cost- saving measure in order to prevent particle contamination when performing a welding process such as particularly an ultrasonic welding process sue to scattered particles (20).

Abstract translation: 本发明涉及一种通过超声波焊接连接两个部件的方法，用于制造功率半导体模块，所述方法包括以下步骤：a）对准被焊接部件以形成焊接界面（16）; b）将焊接工具（18）对齐到对准的部件; c）可移除地布置至少部分地包围焊接界面（16）的捕集材料（20），由此捕集材料（20）是泡沫体; 和d）通过激活焊接工具（18）连接组件。 如上所述的方法提供了一种简单且成本节约的措施，以便在执行诸如特别是对散射颗粒（20）的超声波焊接工艺的焊接过程时防止颗粒污染。

公开(公告)号：WO2010100125A1

公开(公告)日：2010-09-10

申请号：PCT/EP2010/052586

申请日：2010-03-02

Applicant: ABB TECHNOLOGY AG ,  TRÜSSEL, Dominik ,  SCHNEIDER, Daniel

Inventor： TRÜSSEL, Dominik ,  SCHNEIDER, Daniel

IPC: H01R4/30 ,  H01R4/64

CPC classification number: H01R4/302 ,  H01R4/64

Abstract: A fastening device for an electric module is provided. The fastening device is adapted for fastening at least one electric conductor unit at an electric module and comprises a screw nut compartment adapted to receive a screw nut, wherein the screw nut compartment has an open first side for inserting the screw nut and / or a screw, and a second side arranged opposite to the first side. The fastening device further comprises a stiffening extension formed at the second side of the screw nut compartment, wherein the stiffening extension has a non-circular cross section.

Abstract translation: 提供了一种用于电气模块的紧固装置。 所述紧固装置适于将至少一个电导体单元紧固在电气模块处，并且包括适于容纳螺母的螺母室，其中所述螺母螺母隔室具有用于插入所述螺母的开放的第一侧和/或螺钉 以及与第一侧相对设置的第二侧。 紧固装置还包括形成在螺母螺母隔室的第二侧处的加强延伸部，其中加强延伸部具有非圆形横截面。

公开(公告)号：WO2013057172A1

公开(公告)日：2013-04-25

申请号：PCT/EP2012/070621

申请日：2012-10-18

Applicant: ABB TECHNOLOGY AG ,  DUGAL, Franc ,  TRÜSSEL, Dominik

Inventor： DUGAL, Franc ,  TRÜSSEL, Dominik

IPC: H01L25/07 ,  H01L23/051 ,  H01L23/48 ,  H01L23/62

CPC classification number: H01L23/492 ,  H01L23/051 ,  H01L23/585 ,  H01L23/62 ,  H01L24/72 ,  H01L25/072 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00

Abstract: The present invention provides a power semiconductor module (1) comprising an electrically conducting base plate (2), an electrically conducting top plate, arranged in parallel to the base plate (2) and spaced apart from the base plate (2), at least one power semiconductor device (3), which is arranged on the base plate (2) in a space formed between the base plate (2) and the top plate, and at least one presspin (5, 7), which is arranged in the space formed between the base plate (2) and the top plate to provide contact between the semiconductor device (3) and the top plate, whereby a metallic protection plate (11) is provided at an inner face of the top plate facing towards the base plate (2), whereby the material of the protection plate (11) has a melting temperature higher than the melting temperature of the top plate. The present invention further provides a power semiconductor module assembly, comprising multiple power semiconductor modules (1) as mentioned above, whereby the power semiconductor modules (1) are arranged side by side to each other with electric connections between adjacent power semiconductor modules (1).

Abstract translation: 本发明提供一种功率半导体模块（1），包括导电基板（2），导电顶板，平行于基板（2）并与基板（2）间隔开，至少 一个功率半导体器件（3），其布置在基板（2）上形成在基板（2）和顶板之间的空间中，以及至少一个按压（5,7），其设置在 在基板（2）和顶板之间形成的空间，以在半导体器件（3）和顶板之间提供接触，由此金属保护板（11）设置在顶板的面向底座 板（2），由此保护板（11）的材料的熔融温度高于顶板的熔化温度。 本发明还提供一种功率半导体模块组件，其包括如上所述的多个功率半导体模块（1），由此功率半导体模块（1）彼此并排设置，在相邻的功率半导体模块（1）之间具有电连接， 。

公开(公告)号：WO2009013186A1

公开(公告)日：2009-01-29

申请号：PCT/EP2008/059258

申请日：2008-07-16

Applicant: ABB TECHNOLOGY AG ,  TRÜSSEL, Dominik ,  SCHNEIDER, Daniel

Inventor： TRÜSSEL, Dominik ,  SCHNEIDER, Daniel

IPC: H01L25/16 ,  H01L23/24

CPC classification number: H01L23/3135 ,  H01L23/296 ,  H01L25/072 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor module (1) comprises a base plate (2), at least one semiconductor chip (3) mounted on the base plate (2), a case (4) fixed to the base plate (2) and surrounds the at least one semiconductor chip (3), an electrically insulating gel layer (5) covering the at least one semiconductor chip (3) and a thermosetting resin layer (6) on top of gel layer (5), a lid (7) on top of the thermosetting resin layer (6). The lid (7) comprises a lid-extension (73), which defines a lid-opening (71), which extends through the thermosetting resin layer (6) to the gel layer (5) and by which lid-opening (71) the gel can expand.

Abstract translation: 半导体模块（1）包括基板（2），安装在基板（2）上的至少一个半导体芯片（3），固定到基板（2）的壳体（4）并且包围至少一个 半导体芯片（3），覆盖所述至少一个半导体芯片（3）的电绝缘凝胶层（5）和在所述凝胶层（5）的顶部上的热固性树脂层（6），盖（7） 热固性树脂层（6）。 盖（7）包括盖延伸部（73），其限定了通过热固性树脂层（6）延伸到凝胶层（5）并且盖开口（71）的盖开口（71） 凝胶可以膨胀。

公开(公告)号：WO2015007507A1

公开(公告)日：2015-01-22

申请号：PCT/EP2014/063843

申请日：2014-06-30

Applicant: ABB TECHNOLOGY AG

Inventor： PÂQUES, Gontran ,  TRÜSSEL, Dominik ,  BATINIC, Klaudio ,  SCHNELL, Raffael ,  EHRBAR, Roman

IPC: H01L23/24 ,  H01L25/16 ,  H01L23/16

CPC classification number: H01L23/24 ,  H01L23/16 ,  H01L24/73 ,  H01L25/162 ,  H01L25/165 ,  H01L2224/45124 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/19107 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/00

Abstract: The present invention provides a Power semiconductor module, comprising a baseplate equipped with metallizations that are electrically isolated towards the baseplate; at least one power semiconductor device being arranged on a metallization; a circuit board (12) with at least one circuit component, the circuit board having a connection area for connecting at least one circuit component to a metallization by means of a bond wire (18), wherein the circuit board (12) is mounted spaced apart from at least one power semiconductor device; a frame (16) for supporting the circuit board, and a housing for enclosing the power semiconductor module, wherein the housing is filled with an insulating gel, and wherein at least the connection area is immovably fixed to the frame (16). Such a power semiconductor module may provide a significantly increased resistance against thermocycling effects and may particularly withstand even huge amounts of expansion and contracting cycles of the insulating gel.

Abstract translation: 本发明提供一种功率半导体模块，其包括配备有朝向基板电隔离的金属化的基板; 至少一个功率半导体器件布置在金属化上; 具有至少一个电路部件的电路板（12），所述电路板具有用于通过接合线（18）将至少一个电路部件连接到金属化的连接区域，其中所述电路板（12）间隔开地安装 除了至少一个功率半导体器件; 用于支撑电路板的框架（16）和用于封闭功率半导体模块的壳体，其中壳体填充有绝缘凝胶，并且其中至少连接区域不可移动地固定到框架（16）。 这样的功率半导体模块可以提供显着增加的耐热循环效应的电阻，并且可以特别地承受绝缘凝胶的甚至大量的膨胀和收缩循环。

公开(公告)号：WO2014090686A1

公开(公告)日：2014-06-19

申请号：PCT/EP2013/075711

申请日：2013-12-05

Applicant: ABB TECHNOLOGY AG

Inventor： HARTMANN, Samuel ,  TRÜSSEL, Dominik ,  SCHNELL, Raffael

IPC: H01L25/07

CPC classification number: H01L25/072 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Ein Leistungshalbleitermodul umfasst eine Anzahl N parallel zu einer Basisebene angeordneter Leistungshalbleiter-Schaltelemente, von denen jedes eine Anzahl an Schaltelement-Kontakten aufweist, umfassend einen Steuerkontakt, einen ersten Leistungskontakt und einen zweiten Leistungskontakt wobei mittels einer zwischen Steuerkontakt und erstem Leistungskontakt anliegenden Steuerspannung ein Strom zwischen den Leistungskontakten schaltbar ist; eine Kontaktierungsanordnung zur Kontaktierung der Schaltelement-Kontakte, umfassend: ein erstes Verbindungsblech, welches N erste Kontakte aufweist, über welche es elektrisch leitend mit den Steuerkontakten der N Leistungshalbleiter-Schaltelemente verbunden ist, ein zweites Verbindungsblech, welches N zweite Kontakte aufweist, über welche es elektrisch leitend mit den ersten Leistungskontakten der N Leistungshalbleiter-Schaltelemente verbunden ist, ein drittes Verbindungsblech, welches n dritte Kontakte aufweist, über welche es elektrisch leitend mit zweiten Leistungskontakten zumindest einer Teilmenge enthaltend n N der N Leistungshalbleiter-Schaltelemente verbunden ist; und wobei zum Anlegen einer Steuer-Sollspannung zwischen den Steuerkontakten und den ersten Leistungskontakten der Leistungshalbleiter-Schaltelemente ein Referenzanschluss am zweiten Verbindungsblech vorgesehen ist, welcher über die zweiten Kontakte elektrisch leitend mit den ersten Leistungskontakten der N Leistungshalbleiter-Schaltelemente verbunden ist.

Abstract translation: 一种功率半导体模块包括多个N个并行的以一个基本平面配置功率半导体开关元件，其每一个具有多个开关元件接触，包括控制触点，第一电触头和通过控制触点之间的第一电触头的控制电压之间的电压与电流的第二电源触头 被切换到电源触点; 一个用于接触所述开关元件接触，包括使装置：具有N个第一触点的第一连接板，通过它与所述N个功率半导体开关元件的控制端子电连接的，具有N个第二触点的第二连接板，经由该 导电地连接到所述N个功率半导体的第一电源触头开关元件，具有n个第三触点的第三连接片，通过它包含n <= N个功率半导体开关元件的N被导电地连接到所述第二电源触头的至少一个子集; 和被设置用于控制器触点和开关元件的功率半导体的第一电源触点之间施加控制电压指令，在第二连接板，其导电地经由与N个功率半导体开关元件的第一功率接触第二触点连接的参考端口。

公开(公告)号：EP3046717A1

公开(公告)日：2016-07-27

申请号：EP14720125.5

申请日：2014-04-28

Applicant: ABB Technology AG

Inventor： SIVASUBRAMANIAM, Venkatesh ,  GUILLON, David ,  TRÜSSEL, Dominik ,  THUT, Markus ,  HARTMANN, Samuel

IPC: B23K20/10 ,  B23K20/26

Abstract: The present invention relates to a method of connecting two components by ultrasonic welding for producing a power semiconductor module, said method comprising the steps of: a) Aligning the components to be welded to form a welding interface; b) Aligning a welding tool to the aligned components; c) Removably arranging a trapping material at least partly encompassing the welding interface, whereby the trapping material is a foam; and d) Connecting the components by activating the welding tool. The method like described above provides an easy and cost-saving measure in order to prevent particle contamination when performing a welding process such as particularly an ultrasonic welding process sue to scattered particles.

公开(公告)号：EP2862202A1

公开(公告)日：2015-04-22

申请号：EP13729005.2

申请日：2013-06-06

Applicant: ABB Technology AG

Inventor： HARTMANN, Samuel ,  TRÜSSEL, Dominik

IPC: H01L25/07 ,  H01L23/00

CPC classification number: H01L25/072 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/45014 ,  H01L2224/48101 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099

Abstract: The present invention provides a substrate (1) for mounting multiple power transistors (21, 30) thereon, comprising a first metallization (3), on which the power transistors (21, 30) are commonly mountable with their collector or emitter, and which extends in at least one line (5) on the substrate (1), a second metallization (9), which extends in an area (11) next to the at least one line (5) of the first metallization (3), for connection to the remaining ones of the emitters or collectors of the power transistors (21, 30), and a third metallization (13) for connection to gate contact pads (25) of the power transistors (21, 30), whereby the third metallization (13) comprises a gate contact (15) and at least two gate metallization areas (16, 18), which are interconnectable by way of bonding means (19), the gate metallization areas (16, 18) are arranged in parallel to the at least one line (5) and spaced apart in a longitudinal direction of the at least one line (5), and at least one gate metallization area is provided as a gate island (16) surrounded on the substrate (1) by the second metallization (9). The second metallization (9) is adapted for mounting multiple power transistors (21, 30) with their collectors or emitters thereon, whereby the power transistors (21, 30) have the same orientation like the power transistors (21, 30) mounted on the first metallization (3). The substrate (1 ) comprises a fourth metallization (42), which extends in an area (44) next to the second metallization (9), for connection to the remaining ones of the emitters or collectors of the power transistors (21, 30) mountable on the second metallization (9). A fifth metallization (46) is provided for connection to gate contact pads (25) of the power transistors (21, 30) mountable on the second metallization (9), whereby the fifth metallization (46) comprises at least two gate metallization areas (16, 18), which are interconnectable by way of bonding means (19), the gate metallization areas (16, 18) are arranged in parallel to the at least one line (5) and spaced apart in a longitudinal direction of the at least one line (5), and at least one gate metallization area is provided as a gate island (16) surrounded on the substrate (1 ) by the fourth metallization (42).

公开(公告)号：EP2769410A1

公开(公告)日：2014-08-27

申请号：EP12772970.5

申请日：2012-10-18

Applicant: ABB Technology AG

Inventor： DUGAL, Franc ,  TRÜSSEL, Dominik

IPC: H01L25/07 ,  H01L23/051 ,  H01L23/48 ,  H01L23/62

CPC classification number: H01L23/492 ,  H01L23/051 ,  H01L23/585 ,  H01L23/62 ,  H01L24/72 ,  H01L25/072 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00

Abstract: The present invention provides a power semiconductor module (1) comprising an electrically conducting base plate (2), an electrically conducting top plate, arranged in parallel to the base plate (2) and spaced apart from the base plate (2), at least one power semiconductor device (3), which is arranged on the base plate (2) in a space formed between the base plate (2) and the top plate, and at least one presspin (5, 7), which is arranged in the space formed between the base plate (2) and the top plate to provide contact between the semiconductor device (3) and the top plate, whereby a metallic protection plate (11) is provided at an inner face of the top plate facing towards the base plate (2), whereby the material of the protection plate (11) has a melting temperature higher than the melting temperature of the top plate. The present invention further provides a power semiconductor module assembly, comprising multiple power semiconductor modules (1) as mentioned above, whereby the power semiconductor modules (1) are arranged side by side to each other with electric connections between adjacent power semiconductor modules (1).