公开(公告)号：WO1996021300A1

公开(公告)日：1996-07-11

申请号：PCT/US1995014638

申请日：1995-11-08

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  LO, William ,  CRAYFORD, Ian

IPC: H04L12/22

CPC classification number: H04L12/44 ,  B60G17/0182 ,  B60G2400/102 ,  B60G2400/202 ,  B60G2600/182 ,  B60G2600/1872 ,  B60G2600/1873 ,  B60G2800/162 ,  H04L12/22 ,  H04L63/0236

Abstract: A secure repeater (20) implementing data packet masking includes a programmable and selective, on a per port basis, delay disrupt response. A delay disrupt controller (70) receives signals indicating retransmissions of fields from a data packet. These signals include a destination address field and a source address field. A plurality of memories, one associated with each port, determines the associated port's delay response to the data packet. Each memory stores a delay disrupt control code. When the delay disrupt control code for a particular port has a value indicating that the associated port is enabled to delay disruption of a data packet, security marking is disabled until the source address field is retransmitted from the particular port.

Abstract translation: 实现数据包掩蔽的安全中继器（20）包括在每个端口的可编程和选择性的延迟中断响应。 延迟中断控制器（70）从数据包接收指示字段重传的信号。 这些信号包括目的地址字段和源地址字段。 与每个端口相关联的多个存储器确定相关端口对数据分组的延迟响应。 每个存储器存储一个延迟中断控制码。 当延迟中断特定端口的控制代码具有指示相关端口被使能以延迟数据分组中断的值时，安全标记被禁用，直到源地址字段从特定端口重传为止。

公开(公告)号：WO1998011695A1

公开(公告)日：1998-03-19

申请号：PCT/US1997003538

申请日：1997-03-06

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CRAYFORD, Ian ,  SIVAKOLUNDU, Ramesh ,  CHENG, Bing

IPC: H04L12/44

CPC classification number: H04L12/44

Abstract: A media independent interface for interconnecting an integrated repeater front-end with one or more integrated interface devices, each having several physical layer devices for operation in conformance with IEEE 802.3u. The media independent interface, in a repeater implementation, shares transmit and receive data channels, and provides for dedicated control signals, thereby multiplexing shared channels across all of the physical layer devices in the integrated interface device.

Abstract translation: 用于将集成中继器前端与一个或多个集成接口设备互连的媒体独立接口，每个具有若干物理层设备，用于符合IEEE 802.3u的操作。 在中继器实现中，媒体独立接口共享发送和接收数据信道，并提供专用控制信号，从而在集成接口设备中的所有物理层设备上复用共享信道。

公开(公告)号：WO1996041456A1

公开(公告)日：1996-12-19

申请号：PCT/US1996004658

申请日：1996-04-04

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CRAYFORD, Ian

IPC: H04L12/56

CPC classification number: H04L47/10 ,  H04L12/46 ,  H04L47/135 ,  H04L49/3027 ,  H04L49/351 ,  H04L49/40 ,  H04L49/506

Abstract: A flow control enabled Ethernet switch that applies backpressure to input ports that attempt to transmit a data packet to a busy destination port. The backpressure is a phantom packet that activates the IEEE 802.3 collision detection system to abort transmission of the data packet. A subsequent series of phantom packets (that are invalid) provide carrier activity that inhibits retransmission of the packet. When the destination port is available, the phantom packets are stopped, permitting standard retransmission of the data packet. The switch includes prioritization mechanisms (e.g., a throttle count) to use when awarding priority to a port having backpressure applied.

Abstract translation: 启用流量控制的以太网交换机，将反向压力应用于尝试将数据包传输到繁忙目标端口的输入端口。 背压是激活IEEE 802.3冲突检测系统以中止数据分组传输的幻影分组。 随后的一系列虚幻分组（无效）提供禁止分组重传的运营商活动。 当目的端口可用时，幻象分组被停止，允许数据分组的标准重传。 交换机包括在向具有背压的端口授予优先权时使用的优​​先化机制（例如，节气门计数）。

公开(公告)号：WO1996021302A1

公开(公告)日：1996-07-11

申请号：PCT/US1995015259

申请日：1995-11-22

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  LO, William ,  CRAYFORD, Ian

IPC: H04L12/46

CPC classification number: H04L12/46 ,  H04L12/18 ,  H04L12/44 ,  H04L45/7453 ,  H04L63/10

Abstract: In a repeater (10) having multiple ports (40) and receiving at a source port a data packet containing a received address, an address mapping system including a content addressable memory (CAM) with address registers containing stored addresses, and an address mapping matrix (100) coupled to said CAM, for perfectly mapping any of the address registers to any of the ports. According to one aspect of the invention, it operates in a repeater having an address compare and disrupt security system. The preferred embodiment of the present invention includes a content addressable memory having address registers containing stored individual and multicast addresses associated with each repeater port, and an address mapping matrix including a disrupt enable circuit (120) associated with each port, for enabling the disruption of the data packet at that port when the received destination address does not match the associated stored addresses, and for disabling the disruption of the data packet at that port when the received destination address matches the stored address in a particular register and that particular register is mapped to that port via an address mapping register (110).

Abstract translation: 在具有多个端口（40）并且在源端口接收包含接收到的地址的数据分组的中继器（10）中，包括具有包含存储的地址的地址寄存器的内容可寻址存储器（CAM）的地址映射系统以及地址映射矩阵 （100），用于将任何地址寄存器完美地映射到任何端口。 根据本发明的一个方面，其操作在具有地址比较和中断安全系统的中继器中。 本发明的优选实施例包括内容可寻址存储器，其具有包含与每个中继器端口相关联的存储的单独和多播地址的地址寄存器，以及包括与每个端口相关联的中断使能电路（120）的地址映射矩阵， 当接收到的目的地地址与相关联的存储地址不匹配时，该端口处的数据分组，以及当接收到的目的地地址与特定寄存器中存储的地址匹配并且该特定寄存器被映射时禁止在该端口处的数据分组的中断 经由地址映射寄存器（110）发送到该端口。

公开(公告)号：WO1996041455A1

公开(公告)日：1996-12-19

申请号：PCT/US1996004892

申请日：1996-04-09

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CRAYFORD, Ian

IPC: H04L12/44

CPC classification number: H04L47/10 ,  H04L12/413 ,  H04L47/135 ,  H04L49/205 ,  H04L49/3027 ,  H04L49/351 ,  H04L49/506

Abstract: A flow control enabled Ethernet switch that applies backpressure to input ports that attempt to transmit a data packet to a busy destination port. The backpressure is a phantom packet that activates to abort transmission of the data packet. When the destination port is available, the phantom packets control retransmission, permitting standard retransmission of the data packet. The switch may include prioritization mechanisms to use when awarding priority to a port having backpressure applied.

Abstract translation: 启用流量控制的以太网交换机，将反向压力应用于尝试将数据包传输到繁忙目标端口的输入端口。 背压是一个幻影包，激活以中止数据包的传输。 当目的端口可用时，幻影分组控制重传，允许数据分组的标准重传。 该交换机可以包括在向具有背压应用的端口授予优先权时使用的优​​先级机制。

公开(公告)号：WO1996021299A1

公开(公告)日：1996-07-11

申请号：PCT/US1995015297

申请日：1995-11-22

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  LO, William ,  CRAYFORD, Ian

IPC: H04L12/18

CPC classification number: H04L63/0236 ,  H04L12/1886 ,  H04L12/22 ,  H04L12/44

Abstract: A secure repeater implementing data packet masking includes a programmable and selective, on a per port basis, multicast response. A multicast controller (70x) receives a multicast identifier extracted from a destination address field of a data packet. A plurality of memories, one associated with each port (85x), determines the associated ports response to the multicast identifier. Each memory stores a multicast control code. When the multicast control code for a particular port has a value indicating that the associated port is enabled to receive multicast packets, assertion of the multicast identifier to the multicast controller for the particular port results in disabling the security masking for the port and subsequent transmission of unmodified data from the particular port.

Abstract translation: 实现数据包掩蔽的安全中继器包括基于每端口的可编程和选择性的多播响应。 多播控制器（70x）接收从数据包的目的地地址字段提取的多播标识符。 与每个端口（85x）相关联的多个存储器确定相关端口对多播标识符的响应。 每个存储器存储组播控制代码。 当特定端口的组播控制代码具有指示关联的端口被允许接收多播分组的值时，将特定端口的组播标识符断言给组播控制器导致禁用该端口的安全掩蔽并随后传输 来自特定端口的未修改数据。

公开(公告)号：WO1996038949A1

公开(公告)日：1996-12-05

申请号：PCT/US1996004663

申请日：1996-04-04

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  LO, William ,  CRAYFORD, Ian

IPC: H04L12/22

CPC classification number: H04L63/02 ,  H04L12/22 ,  H04L12/44 ,  H04L12/4625

Abstract: A secure repeater (20) implementing data packet masking includes a programmable and selective, on a per port basis, disrupt response responsive to any of several selectable qualifying conditions. A disrupt controller (70) receives signals indicating various characteristics of fields of a data packet, and other conditions. A register bank (76) includes a plurality of memories, one associated with each port and some of the conditions, assists the disrupt controller to determine the associated port's disrupt response to the data packet. Each memory stores a disrupt control code. When the disrupt control code for a particular port has a value indicating that the associated port is enabled, deassertion of a condition signal associated with that control code results in disruption of a data packet. A cell array (200) permits simple, efficient scaling and formation of integrated semiconductor structures to implement complex disrupt logic equations.

Abstract translation: 实现数据分组屏蔽的安全中继器（20）包括在每个端口基础上的可编程和选择性响应于若干可选择的条件条件中的任何一个的中断响应。 中断控制器（70）接收指示数据分组的各种特性的信号以及其他条件。 寄存器组（76）包括多个存储器，一个与每个端口相关联的存储器和一些条件，帮助中断控制器确定相关端口对数据包的中断响应。 每个存储器存储中断控制代码。 当特定端口的中断控制代码具有指示相关端口被使能的值时，与该控制代码相关联的条件信号的取消取消导致数据分组的中断。 单元阵列（200）允许简单，有效地缩放和形成集成半导体结构以实现复杂的中断逻辑方程。

公开(公告)号：WO1996029802A1

公开(公告)日：1996-09-26

申请号：PCT/US1996000774

申请日：1996-01-23

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CRAYFORD, Ian ,  MCROBERT, Stephen

IPC: H04L12/44

CPC classification number: H04L12/46 ,  H04L12/44

Abstract: An integrated repeater (100) for implementing per-port Port Mobility is provided as part of a semiconductor integrated repeater package. The integrated repeater includes a number of Pseudo-AUI ports for connecting to transceiver devices (104). Each repeater device is coupled into a collision domain. By connecting one transceiver device to multiple repeaters in different collision domains, and controlling the connection to the repeater, the network port associated with the transceiver device is moved from one collision domain into another. Corresponding Pseudo-AUI ports on repeaters not part of the desired collision domain are isolated (using a tri-state gate). Various repeater resources are shared across the various network ports, even though they may be in different collision domains.

Abstract translation: 提供用于实现每端口端口移动性的集成中继器（100）作为半导体集成中继器包的一部分。 集成中继器包括多个用于连接到收发器设备（104）的伪AUI端口。 每个中继器设备耦合到冲突域。 通过将一个收发器设备连接到不同冲突域中的多个中继器，并且控制与中继器的连接，与收发器设备相关联的网络端口从一个冲突域移动到另一个。 在不是所需冲突域的一部分的转发器上的对应的伪AUI端口被隔离（使用三态门）。 各种中继器资源在各种网络端口之间共享，即使它们可能处于不同的冲突域。

公开(公告)号：EP0960536B1

公开(公告)日：2003-08-20

申请号：EP98908483.5

申请日：1998-02-06

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： ERIMLI, Bahadir ,  CRAYFORD, Ian ,  EGBERT, Chandan

IPC: H04Q3/64

CPC classification number: H04L69/26 ,  G06F5/06 ,  G06F12/128 ,  G11C7/1015 ,  G11C11/412 ,  H04L12/1877 ,  H04L12/1881 ,  H04L12/4641 ,  H04L12/4645 ,  H04L12/467 ,  H04L41/0213 ,  H04L47/50 ,  H04L47/6215 ,  H04L49/103 ,  H04L49/205 ,  H04L49/255 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/3027 ,  H04L49/351 ,  H04L49/354 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9073 ,  H04L49/9078 ,  H04Q3/54591 ,  H04Q2213/1316 ,  H04Q2213/13162

Abstract: A method and arrangement for queuing data in a prioritized manner have a queue with a single queue write side in which data entries are input to the queue. The queue also has a plurality of queue read sides, with each read side having a different priority level. An entry exiting from the queue write side is examined to determine the priority level of the entry, and then placed into the queue read side with the matching priority level as the entry. The queue read sides form the output of the queue, and are polled and emptied so that the higher priority queues are emptied completely before emptying lower priority queues.

Abstract translation: 以优先排序方式排队数据的方法和装置具有一个具有单个队列写入端的队列，其中将数据条目输入队列。 队列还具有多个队列读取侧，每个读取侧具有不同的优先级。 检查从队列写入端退出的条目以确定条目的优先级，然后将其与匹配的优先级作为条目放入队列读取端。 队列读取端形成队列的输出，并被轮询和清空，以便在排空较低优先级队列之前，将更高优先级队列完全清空。

公开(公告)号：EP0960512B1

公开(公告)日：2002-01-09

申请号：EP98905072.9

申请日：1998-02-09

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： CRAYFORD, Ian ,  KERSTEIN, Denise

IPC: H04L12/44

CPC classification number: H04L12/1877 ,  G06F5/06 ,  G06F12/128 ,  G11C7/1015 ,  G11C11/412 ,  H04L12/4641 ,  H04L12/4645 ,  H04L12/467 ,  H04L41/0213 ,  H04L49/201 ,  H04L49/25 ,  H04L49/3009 ,  H04L49/3027 ,  H04L49/354 ,  H04L49/45 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9073 ,  H04L49/9078 ,  H04L69/26 ,  H04Q3/54591 ,  H04Q2213/1316 ,  H04Q2213/13162

Abstract: Management data is supplied to a management agent by a network switch by generating management packets having at least a portion of a received data packet, and management information specifying receive status and network switch response characteristics to the corresponding received data packet. The network switch includes a plurality of network ports, including network traffic ports and one management port for synthesizing the management frame. A network traffic port receiving a data packet generates receive status data specifying the reception status of the received data packet, including the presence of cyclic redundancy check (CRC) errors, frame alignment errors, and receive buffer overflow conditions. The received data packet and received status data are stored in a buffer memory, while switching logic generates port vectors specifying destination output ports and switching logic data specifying the switching logic response to the received data packet. The management port selectively compiles the received status data, the switching logic data, and at least a portion of the received data frame into a management frame, and outputs the synthesized management frame to a management agent according to a media access control (MAC) layer protocol. The generation of management frame provides detailed management information corresponding to characteristics of the received data packet and the corresponding network switch response, independent of the timing at which the data packet was received by the network switch.