METHOD AND APPARATUS FOR SOFTWARE ACCESS TO A MICROPROCESSOR SERIAL NUMBER
    1.
    发明申请
    METHOD AND APPARATUS FOR SOFTWARE ACCESS TO A MICROPROCESSOR SERIAL NUMBER 审中-公开
    软件访问微处理器序列号的方法和装置

    公开(公告)号:WO1997036238A1

    公开(公告)日:1997-10-02

    申请号:PCT/US1997005020

    申请日:1997-03-28

    Abstract: A method and apparatus for software to access a microprocessor serial number. Provision of the serial number allows the manufacturer better control over its product and also permits software vendors to register their products. The serial number is encrypted using a pair of encryption keys to prevent unauthorized changes. At least one of the encryption keys is itself encoded to prevent unauthorized access, while permitting software to access the serial number.

    Abstract translation: 一种用于访问微处理器序列号的软件的方法和装置。 提供序列号允许制造商更好地控制其产品,并允许软件供应商注册其产品。 使用一对加密密钥对序列号进行加密,以防止未经授权的更改。 至少有一个加密密钥本身被编码以防止未经授权的访问,同时允许软件访问序列号。

    METHOD AND APPARATUS FOR UPGRADING THE SOFTWARE LOCK OF A MICROPROCESSOR
    4.
    发明申请
    METHOD AND APPARATUS FOR UPGRADING THE SOFTWARE LOCK OF A MICROPROCESSOR 审中-公开
    用于升级微处理器软件锁的方法和装置

    公开(公告)号:WO1997036237A1

    公开(公告)日:1997-10-02

    申请号:PCT/US1997005019

    申请日:1997-03-28

    Abstract: A method and apparatus for providing, maintaining and upgrading the software lock of a microprocessor. When a processor upgrade occurs, software that was serialized to the previously installed processor detects that it is running on an unauthorized processor. The software initiates a reauthorization process based on a reauthorization use profile. The temporary re-enabling of the software is allowed if the authorization service is not available.

    Abstract translation: 一种用于提供,维护和升级微处理器的软件锁的方法和装置。 当处理器升级发生时,序列化到先前安装的处理器的软件会检测到它在未经授权的处理器上运行。 该软件基于重新授权使用配置文件启动重新授权过程。 如果授权服务不可用,则允许软件的临时重新启用。

    MEMORY PAGE COMPRESSION
    5.
    发明申请
    MEMORY PAGE COMPRESSION 审中-公开
    记忆页压缩

    公开(公告)号:WO1997023828A1

    公开(公告)日:1997-07-03

    申请号:PCT/US1996012005

    申请日:1996-07-19

    Abstract: A memory paging and compression system for a computer having a memory and an execution unit includes an address mapping hierarchy, a compressed page mapping hierarchy, a translation lookaside buffer, and a compression/decompression component. The address mapping hierarchy includes page tables having page table entries which map from a first portion of virtual addresses to respective pages in physical memory. The compressed page mapping hierarchy includes compressed page tables having compressed page table entries mapping from the first portion of virtual addresses to respective compressed pages in physical memory. The translation lookaside buffer caches recently used ones of the mappings from the first portion of virtual addresses to respective pages in physical memory. The compression/decompression component includes a compression/decompression engine coupled between a memory and an execution unit for alternately compressing and decompressing pages in memory in respective correspondence with spills from and loads to the translation lookaside buffer. The address mapping hierarchy and compressed page mapping hierarchy may be represented in memory and the compression/decompression component may further include a decompression fault handler and a compression fault handler, each executable on the execution unit.

    Abstract translation: 用于具有存储器和执行单元的计算机的存储器寻呼和压缩系统包括地址映射层级,压缩页面映射层级,翻译后端缓冲器和压缩/解压缩组件。 地址映射层次结构包括具有从虚拟地址的第一部分映射到物理存储器中的相应页面的页表条目的页表。 压缩页面映射层级包括具有从虚拟地址的第一部分映射到物理存储器中的相应压缩页面的压缩页表项的压缩页表。 翻译后备缓冲区最近缓存了从虚拟地址的第一部分到物理存储器中各页的映射关系。 压缩/解压缩组件包括耦合在存储器和执行单元之间的压缩/解压缩引擎,用于交替地压缩和解压缩存储器中的页面,以分别对应于来自翻译后备缓冲器的溢出和加载。 地址映射层级和压缩页映射层次可以在存储器中表示,并且压缩/解压缩组件还可以包括解压缩故障处理程序和压缩故障处理程序,每个执行单元都可执行。

    MEMORY PAGE COMPRESSION
    8.
    发明授权
    MEMORY PAGE COMPRESSION 失效
    内存页压缩

    公开(公告)号:EP0976045B1

    公开(公告)日:2002-04-24

    申请号:EP96924645.3

    申请日:1996-07-19

    Abstract: A memory paging and compression system for a computer having a memory and an execution unit includes an address mapping hierarchy, a compressed page mapping hierarchy, a translation lookaside buffer, and a compression/decompression component. The address mapping hierarchy includes page tables having page table entries which map from a first portion of virtual addresses to respective pages in physical memory. The compressed page mapping hierarchy includes compressed page tables having compressed page table entries mapping from the first portion of virtual addresses to respective compressed pages in physical memory. The translation lookaside buffer caches recently used ones of the mappings from the first portion of virtual addresses to respective pages in physical memory. The compression/decompression component includes a compression/decompression engine coupled between a memory and an execution unit for alternately compressing and decompressing pages in memory in respective correspondence with spills from and loads to the translation lookaside buffer. The address mapping hierarchy and compressed page mapping hierarchy may be represented in memory and the compression/decompression component may further include a decompression fault handler and a compression fault handler, each executable on the execution unit.

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