公开(公告)号：US3508078A

公开(公告)日：1970-04-21

申请号：US3508078D

申请日：1966-09-01

Applicant: AGENCY IND SCIENCE TECHN

Inventor： KOMAMIYA YASUO ,  MORISAWA KAZUYOSHI ,  TSUCHIYA SEIJI ,  TAKEUCHI NORIAKI ,  OKAMOTO KENJI

IPC: H03K19/007 ,  H03K19/08 ,  H03K19/24 ,  H03K19/32

CPC classification number: H03K19/007

公开(公告)号：US3586845A

公开(公告)日：1971-06-22

申请号：US3586845D

申请日：1967-09-06

Applicant: AGENCY IND SCIENCE TECHN

Inventor： KOMAMIYA YASUO ,  KUROKAWA KAZUO ,  GOTO TATSUO ,  MORI RYOICHI ,  TAJIMA HIRAOKI

IPC: G06F7/50 ,  G06F7/501 ,  G06F7/385

CPC classification number: G06F7/501 ,  G06F2207/4814

Abstract: This invention relates to a digital logic circuit which incorporates an analogue operational amplifier as a component of the circuit.

公开(公告)号：US3444392A

公开(公告)日：1969-05-13

申请号：US3444392D

申请日：1965-07-21

Applicant: AGENCY IND SCIENCE TECHN

Inventor： KOMAMIYA YASUO ,  SUGIVAMA TAKEJI

IPC: H03K19/00 ,  H03K19/10 ,  H03K19/12 ,  H03K19/173 ,  H03K19/08 ,  H03K3/26

CPC classification number: H03K19/12 ,  H03K19/00 ,  H03K19/10 ,  H03K19/173

公开(公告)号：DE2613581A1

公开(公告)日：1976-12-02

申请号：DE2613581

申请日：1976-03-30

Applicant: AGENCY IND SCIENCE TECHN

Inventor： TATENO HIROSHI ,  KATAOKA SHOEI ,  TANASHI TOKIO ,  HASHIZUME NOBUO ,  KOMAMIYA YASUO

IPC: H01L47/00 ,  H01P3/08 ,  H01L27/02 ,  H01L29/92 ,  H01P3/00 ,  H03C7/02 ,  H01P1/15 ,  H03K7/02 ,  H03K17/56 ,  H03K19/08

Abstract: A transmission line is disclosed which comprises a conductive layer, a resistive semiconductor layer disposed on the conductive layer and a blocking electrode disposed on the resistive semiconductor layer. By applying a biasing voltage between the blocking electrode and the conductive layer, a depletion layer is produced in the resistive semiconductor layer, the depletion layer formed in the semiconductor layer being used as a medium for transmission of electromagnetic wave.

公开(公告)号：DE1764870A1

公开(公告)日：1972-08-03

申请号：DE1764870

申请日：1968-08-22

Applicant: AGENCY IND SCIENCE TECHN

Inventor： KATAOKA SHOEI ,  TATENO HIROSHI ,  FUJISADA HIROYUKI ,  YAMADA HIDEO ,  KAWASHIMA MITSUO ,  KOMAMIYA YASUO

IPC: F16C33/10 ,  H01L47/00 ,  H01L47/02 ,  H01L

公开(公告)号：GB1242731A

公开(公告)日：1971-08-11

申请号：GB4019968

申请日：1968-08-22

Applicant: AGENCY IND SCIENCE TECHN

Inventor： KATAOKA SHOEI ,  TATENO HIROSHI ,  FUJISADA HIROYUKI ,  YAMADA HIDEO ,  KAWASHIMA MITSUO ,  KOMAMIYA YASUO

IPC: H01L47/00

Abstract: 1,242,731. Bulk negative reistance device. JAPAN, AGENCY OF INDUSTRIAL SCIENCE & TECHNOLOGY MINISTRY OF INTERNATIONAL TRADE & INDUSTRY. 22 Aug., 1968 [22 Aug., 1967; 27 Nov., 1967 (4); 29 Nov., 1967; 26 Dec., 1967; 8 March, 1968 (5); 21 March, 1968; 23 April, 1968; 5 July, 1968], No. 40199/68. Heading H1K. A bulk negative-resistance device consists of a two valley semi-conductor with ohmic electrodes adjacent its ends and a layer of high dielectric constant insulation disposed on the body between the ohmic electrodes. This serves to prevent the formation of high field domains in the body. Typically the body is of gallium arsenide and the insulation barium titanate. The body may be flat with insulation formed on or inset in one or both faces, a rod surrounded by a sleeve of insulation or a Y- or H-shaped member of circular or laminar cross-section with an ohmic contact at the end of each arm. Preferably the insulation extends into contact with the ohmic contacts and in this case to prevent the output being shunted through it the insulation may be divided by one or more lateral slots. Instead of extending the insulation in the above manner the cross-section of the ends of the body adjacent the cathode or both ohmic contacts may be increased by a gradual or stepwise increase in thickness or width of the body there. In all cases a fixed D.C. bias is applied between the terminal ohmic contacts and the input signal fed to one contact and output taken from the other. Alternatively capacitive or waveguide input and output arrangements are provided adjacent these contacts. For higher power a parallel-connected stack of devices with common electrodes is used. One or more control electrodes may be disposed on each discrete area of insulation in any of the above configurations. A device adapted for insertion between the conductors of a strip transmission line is also described. In this case, with the device acting as an amplifier the amplification is determined by the length of the body and electron density. To achieve higher amplification factors for a given applied voltage a plurality of devices may be mounted in series along the strip line, mutually spaced by layers of insulation. The ends of the body are preferably tapered to reduce reflections at the semiconductor air interfaces.