公开(公告)号：JP2008010000A

公开(公告)日：2008-01-17

申请号：JP2007199925

申请日：2007-07-31

Applicant: Apple Inc ,  アップル インコーポレイテッド

Inventor： DE CESARE JOSH ,  CULBERT MICHAEL ,  COX KEITH

IPC: G06F1/32

CPC classification number: G06F1/3203

Abstract: PROBLEM TO BE SOLVED: To provide an apparatus for dynamic power management in a processor system, in which an operating system predicts the run state of a processor and sets performance and power dissipation levels, and attains power saving. SOLUTION: A dynamic power management system includes an operating system (OS) that causes a processor to operate in one of multiple run states that have different performance and/or power dissipation levels. The OS selects the run state in response to processor information (e.g., processor load) being monitored by the OS. The OS can predict future states of the processor information based on sampled processor information. The OS can take an average of the predicted and actual samples for comparison with a threshold to select a run state. The OS can track the number of consecutive saturated samples that occur during a selected window of samples. The OS can predict future processor information samples based on the number of consecutive saturated samples. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种处理器系统中的动态功率管理装置，其中操作系统预测处理器的运行状态并设置性能和功耗水平，并实现节能。 解决方案：动态电源管理系统包括操作系统（OS），其使得处理器在具有不同性能和/或功耗水平的多个运行状态之一中操作。 OS响应由OS监视的处理器信息（例如，处理器负载）来选择运行状态。 OS可以基于采样的处理器信息来预测处理器信息的未来状态。 OS可以将预测和实际采样的平均值与阈值进行比较以选择运行状态。 OS可以跟踪在选定的样本窗口期间发生的连续饱和样本的数量。 OS可以基于连续饱和样本的数量预测未来的处理器信息样本。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：AU2011237758A1

公开(公告)日：2012-09-20

申请号：AU2011237758

申请日：2011-04-06

Applicant: APPLE INC

Inventor： DE CESARE JOSH ,  CHO JUNG WOOK ,  TAKAYANAGI TOSHI ,  MILLET TIMOTHY J

IPC: G06F1/00

Abstract: In an embodiment, a power management unit (PMU) may automatically transition (in hardware) the performance states of one or more performance domains in a system. The target performance states to which the performance domains are to transition may be programmable in the PMU by software, and software may signal the PMU that a processor in the system is to enter the sleep state. The PMU may control the transition of the performance domains to the target performance states, and may cause the processor to enter the sleep state. In an embodiment, the PMU may be programmable with a second set of target performance states to which the performance domains are to transition when the processor exits the sleep state. The PMU may control the transition of the performance domains to the second targeted performance states and cause the processor to exit the sleep state.

公开(公告)号：AU2011237758B2

公开(公告)日：2013-10-03

申请号：AU2011237758

申请日：2011-04-06

Applicant: APPLE INC

Inventor： DE CESARE JOSH ,  CHO JUNG WOOK ,  TAKAYANAGI TOSHI ,  MILLET TIMOTHY J

IPC: G06F1/00

Abstract: In an embodiment, a power management unit (PMU) may automatically transition (in hardware) the performance states of one or more performance domains in a system. The target performance states to which the performance domains are to transition may be programmable in the PMU by software, and software may signal the PMU that a processor in the system is to enter the sleep state. The PMU may control the transition of the performance domains to the target performance states, and may cause the processor to enter the sleep state. In an embodiment, the PMU may be programmable with a second set of target performance states to which the performance domains are to transition when the processor exits the sleep state. The PMU may control the transition of the performance domains to the second targeted performance states and cause the processor to exit the sleep state.