USER INTERFACE UNIT FOR FETCHING ONLY ACTIVE REGIONS OF A FRAME
    2.
    发明申请
    USER INTERFACE UNIT FOR FETCHING ONLY ACTIVE REGIONS OF A FRAME 审中-公开
    用户界面单元仅用于框架的活动区域

    公开(公告)号:WO2011085024A1

    公开(公告)日:2011-07-14

    申请号:PCT/US2011/020254

    申请日:2011-01-05

    CPC classification number: G06F3/14 G09G5/14 G09G5/397 G09G2340/10 G09G2360/12

    Abstract: A user interface unit in a graphics processing display pipe may include registers programmable with information that defines active regions of an image frame. Pixels within the active regions of the image frame are meant to be displayed, while pixels outside of the active regions of the image frame are not to be displayed. Fetch circuitry within the user interface unit may fetch frames from memory, fetching only the pixels within the active regions of the image frames as defined by the programmed contents of the registers. The user interface unit may then provide the fetched pixels to a blend unit to blend the fetched pixels with pixels from other frames or pixels of a video stream to produce output frames. When blended with pixels of a video stream, the fetched pixels may be displayed as a graphics overlay on top of the video stream.

    Abstract translation: 图形处理显示管道中的用户界面单元可以包括可以定义图像帧的有效区域的信息来编程的寄存器。 旨在显示图像帧的有效区域内的像素,而不显示图像帧的有效区域之外的像素。 用户接口单元内的提取电路可以从存储器获取帧,仅获取由寄存器的编程内容定义的图像帧的有效区域内的像素。 然后,用户界面单元可以将获取的像素提供给混合单元,以将获取的像素与来自视频流的其他帧或像素的像素混合以产生输出帧。 当与视频流的像素混合时,获取的像素可以被显示为视频流顶部的图形覆盖。

    SYSTEM ON A CHIP WITH ALWAYS-ON PROCESSOR
    3.
    发明申请
    SYSTEM ON A CHIP WITH ALWAYS-ON PROCESSOR 审中-公开
    使用总线处理器的芯片系统

    公开(公告)号:WO2015183404A1

    公开(公告)日:2015-12-03

    申请号:PCT/US2015/023824

    申请日:2015-04-01

    Applicant: APPLE INC.

    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

    Abstract translation: 在一个实施例中,芯片上的系统(SOC)包括当SOC的其余部分断电时保持供电的组件。 该组件可以包括用于从各种设备传感器捕获数据的传感器捕获单元,并且可以对所捕获的传感器数据进行过滤。 响应于过滤,组件可以唤醒SOC的剩余部分以允许处理。 组件可以存储可编程配置数据,与SOC最近断电时的状态相匹配,用于SOC的其他组件,以便在唤醒后重新编程它们。 在一些实施例中,组件可以被配置为唤醒SOC内的存储器控​​制器和到存储器控制器的路径,以便将数据写入存储器。 SOC的其余部分可能仍然断电。

    DUAL IMAGE SENSOR IMAGE PROCESSING SYSTEM AND METHOD
    4.
    发明申请
    DUAL IMAGE SENSOR IMAGE PROCESSING SYSTEM AND METHOD 审中-公开
    双图像传感器图像处理系统和方法

    公开(公告)号:WO2012024155A1

    公开(公告)日:2012-02-23

    申请号:PCT/US2011/047376

    申请日:2011-08-11

    CPC classification number: H04N5/232 H04N5/2258 H04N5/23245

    Abstract: Various techniques are provided for processing image data acquired using a digital image sensor 90. In accordance with aspects of the present disclosure, one such technique may relate to the processing of image data in a system 10 that supports multiple image sensors 90. In one embodiment, the image processing system 32 may include control circuitry configured to determine whether a device is operating in a single sensor mode (one active sensor) or a dual sensor mode (two active sensors). When operating in the single sensor mode, data may be provided directly to a front-end pixel processing unit 80 from the sensor interface of the active sensor. When operating in a dual sensor mode, the image frames from the first and second sensors 90a, 90b are provided to the front-end pixel processing unit 80 in an interleaved manner. For instance, in one embodiment, the image frames from the first and second sensors 90a, 90b are written to a memory 108, and then read out to the front-end pixel processing unit 80 in an interleaved manner.

    Abstract translation: 提供了用于处理使用数字图像传感器90获取的图像数据的各种技术。根据本公开的方面,一种这样的技术可以涉及对支持多个图像传感器90的系统10中的图像数据的处理。在一个实施例中 图像处理系统32可以包括被配置为确定设备是以单个传感器模式(一个有源传感器)或双传感器模式(两个有源传感器)操作的控制电路。 当在单传感器模式下操作时,数据可以从有源传感器的传感器接口直接提供给前端像素处理单元80。 当以双传感器模式操作时,来自第一和第二传感器90a,90b的图像帧以交错的方式提供给前端像素处理单元80。 例如,在一个实施例中,来自第一和第二传感器90a,90b的图像帧被写入存储器108,然后以交错的方式读出到前端像素处理单元80。

    DUAL IMAGE SENSOR IMAGE PROCESSING SYSTEM AND METHOD
    6.
    发明公开
    DUAL IMAGE SENSOR IMAGE PROCESSING SYSTEM AND METHOD 审中-公开
    系统和方法的双图像传感器的处理图像

    公开(公告)号:EP2594063A1

    公开(公告)日:2013-05-22

    申请号:EP11746415.6

    申请日:2011-08-11

    Applicant: Apple Inc.

    CPC classification number: H04N5/232 H04N5/2258 H04N5/23245

    Abstract: Various techniques are provided for processing image data acquired using a digital image sensor 90. In accordance with aspects of the present disclosure, one such technique may relate to the processing of image data in a system 10 that supports multiple image sensors 90. In one embodiment, the image processing system 32 may include control circuitry configured to determine whether a device is operating in a single sensor mode (one active sensor) or a dual sensor mode (two active sensors). When operating in the single sensor mode, data may be provided directly to a front-end pixel processing unit 80 from the sensor interface of the active sensor. When operating in a dual sensor mode, the image frames from the first and second sensors 90a, 90b are provided to the front-end pixel processing unit 80 in an interleaved manner. For instance, in one embodiment, the image frames from the first and second sensors 90a, 90b are written to a memory 108, and then read out to the front-end pixel processing unit 80 in an interleaved manner.

    DATA FILTERING USING CENTRAL DMA MECHANISM
    7.
    发明公开
    DATA FILTERING USING CENTRAL DMA MECHANISM 有权
    数据过滤使用中央DMA机制

    公开(公告)号:EP2350841A1

    公开(公告)日:2011-08-03

    申请号:EP09791269.5

    申请日:2009-08-07

    Applicant: APPLE INC.

    CPC classification number: G06F13/128 Y02D10/14

    Abstract: A method and system is disclosed for passing data processed by a DMA controller through a transmission filter. The method includes the DMA controller accessing data for transfer between an origination location in the system and a destination location in the system. The accessed data is passed through the DMA controller before being sent to the destination location. While the data is being passed through the DMA controller, it is passed through a transmission filter for processing. This processing may include the addition or removal of transmission protocol headers and footers, and determination of the destination of the data. This processing may also include hash-based packet classification and checksum generation and checking. Upon completion of the processing, the data is sent directly to a prescribed destination location, typically either a memory circuit or an I/O device.

    CHROMA CACHE ARCHITECTURE IN BLOCK PROCESSING PIPELINES
    8.
    发明申请
    CHROMA CACHE ARCHITECTURE IN BLOCK PROCESSING PIPELINES 审中-公开
    块式加工管道中的色谱高速缓存架构

    公开(公告)号:WO2016032765A1

    公开(公告)日:2016-03-03

    申请号:PCT/US2015/045129

    申请日:2015-08-13

    Applicant: APPLE INC.

    Abstract: Methods and apparatus for caching reference data in a block processing pipeline. A cache may be implemented to which reference data corresponding to motion vectors for blocks being processed in the pipeline may be prefetched from memory. Prefetches for the motion vectors may be initiated one or more stages prior to a processing stage. Cache tags for the cache may be defined by the motion vectors. When a motion vector is received, the tags can be checked to determine if there are cache block(s) corresponding to the vector (cache hits) in the cache. Upon a cache miss, a cache block in the cache is selected according to a replacement policy, the respective tag is updated, and a prefetch (e.g., via DMA) for the respective reference data is issued.

    Abstract translation: 在块处理流水线中缓存参考数据的方法和装置。 可以实现缓存,其可以从存储器预取哪个对应于在流水线中处理的块的运动矢量的参考数据。 可以在处理阶段之前一个或多个阶段启动用于运动矢量的预取。 高速缓存的缓存标签可以由运动向量定义。 当接收到运动矢量时,可以检查标签以确定是否存在与缓存中的向量(高速缓存命中)相对应的高速缓存块。 在缓存未命中时,根据替换策略来选择高速缓存中的高速缓存块,相应的标签被更新,并且发出用于各个参考数据的预取(例如,经由DMA)。

    DATA FILTERING USING CENTRAL DMA MECHANISM
    9.
    发明申请
    DATA FILTERING USING CENTRAL DMA MECHANISM 审中-公开
    使用中央DMA机制的数据过滤

    公开(公告)号:WO2010039335A1

    公开(公告)日:2010-04-08

    申请号:PCT/US2009/053095

    申请日:2009-08-07

    CPC classification number: G06F13/128 Y02D10/14

    Abstract: A method and system is disclosed for passing data processed by a DMA controller through a transmission filter. The method includes the DMA controller accessing data for transfer between an origination location in the system and a destination location in the system. The accessed data is passed through the DMA controller before being sent to the destination location. While the data is being passed through the DMA controller, it is passed through a transmission filter for processing. This processing may include the addition or removal of transmission protocol headers and footers, and determination of the destination of the data. This processing may also include hash-based packet classification and checksum generation and checking. Upon completion of the processing, the data is sent directly to a prescribed destination location, typically either a memory circuit or an I/O device.

    Abstract translation: 公开了一种通过传输滤波器传送由DMA控制器处理的数据的方法和系统。 该方法包括DMA控制器访问用于在系统中的始发位置和系统中的目的地位置之间传送的数据。 访问的数据在发送到目标位置之前通过DMA控制器传递。 当数据通过DMA控制器时,它通过传输过滤器进行处理。 该处理可以包括添加或删除传输协议报头和页脚,以及确定数据的目的地。 该处理还可以包括基于散列的分组分类和校验和生成和检查。 在处理完成后,数据被直接发送到规定的目的地位置,通常是存储器电路或I / O设备。

    METHOD AND APPARATUS FOR PROLONGING BATTERY LIFE OF A MEDIA PLAYER
    10.
    发明申请
    METHOD AND APPARATUS FOR PROLONGING BATTERY LIFE OF A MEDIA PLAYER 审中-公开
    用于延长媒体播放器电池寿命的方法和装置

    公开(公告)号:WO2009154892A1

    公开(公告)日:2009-12-23

    申请号:PCT/US2009/043319

    申请日:2009-05-08

    CPC classification number: G06F1/30 G06F1/3203

    Abstract: A method of operating a media player is provided. In one embodiment the method includes receiving a plurality of initially configured video settings for viewing a video segment on the media player for a desired playback duration. The method further includes determining power required to play the video segment based on the initial video settings and playing the video segment if the required power matches or is less than total power available to the media player. In another embodiment, the method may further include, if the required power exceeds the total power available to the media player, adjusting one or more of the initial video settings, either automatically or by user inputs, to reduce the power required to play the requested video segment for the desired playback duration.

    Abstract translation: 提供操作媒体播放器的方法。 在一个实施例中,该方法包括接收多个初始配置的视频设置,用于在媒体播放器上观看期望的播放持续时间的视频段。 该方法还包括:如果所需功率匹配或小于媒体播放器可用的总功率,则基于初始视频设置确定播放视频片段所需的功率并播放视频片段。 在另一个实施例中,如果所需功率超过媒体播放器可用的总功率,该方法可以进一步包括:自动地或通过用户输入来调整一个或多个初始视频设置,以减少播放所请求的功率所需的功率 视频段用于所需播放持续时间。

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