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    METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION WITHIN EMBEDDED SYSTEMS
    2.
    发明申请
    METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION WITHIN EMBEDDED SYSTEMS 审中-公开
    用于减少嵌入式系统中的功耗的方法和装置

    公开(公告)号：WO2014055957A1

    公开(公告)日：2014-04-10

    申请号：PCT/US2013/063587

    申请日：2013-10-04

    Applicant: APPLE INC.

    Inventor： WILSON, Daniel ,  DALAL, Anand ,  DE CESARE, Josh

    IPC: G06F13/42 ,  G06F1/32

    CPC classification number: G06F15/17362 ,  G06F1/3287 ,  G06F13/364 ,  G06F13/4282 ,  G06F13/4295 ,  Y02D10/151 ,  Y02D10/171 ,  Y02D50/20

    Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip TM (HSIC) interface are disclosed. In one exemplary embodiment, a "device"-initiated and "host'-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

    Abstract translation: 用于管理例如高速内部设备接口的多个内部集成电路（IC）之间的连接的方法和装置。 公开了用于协调连接和断开事件的改进方案，和/或高速片上TM（HSIC）接口的停止和恢复操作。 在一个示例性实施例中，公开了一种“设备”启动和“主机”发起的连接/断开过程，其提供改进的定时，同步和功率消耗。

    HOST DEVICE SUSPENDING COMMUNICATION LINK TO CLIENT DEVICE BASED ON CLIENT DEVICE NOTIFICATION
    3.
    发明申请
    HOST DEVICE SUSPENDING COMMUNICATION LINK TO CLIENT DEVICE BASED ON CLIENT DEVICE NOTIFICATION 审中-公开
    主机设备暂停通信根据客户端设备通知客户端设备通知

    公开(公告)号：WO2012121982A1

    公开(公告)日：2012-09-13

    申请号：PCT/US2012/027334

    申请日：2012-03-01

    Applicant: APPLE INC. ,  DALAL, Anand ,  ZHANG, Haining ,  ADLER, Mitchell D.

    Inventor： DALAL, Anand ,  ZHANG, Haining ,  ADLER, Mitchell D.

    IPC: G06F13/10 ,  G06F1/32

    CPC classification number: G06F13/102 ,  G06F1/3209 ,  G06F1/3278 ,  G06F2213/0042 ,  Y02D10/157

    Abstract: A communication link between a host device and a client device can be suspended based on a suspend request or notification provided by the client device. The suspend request can be transmitted by a client device to a host device if the client device determines that suspension is appropriate, and can be sent in response to receiving a polling request from the host device. After receiving a suspend request, the host device can initiate an operation to suspend the communication link between the devices.

    Abstract translation: 可以基于由客户端设备提供的挂起请求或通知来暂停主机设备和客户端设备之间的通信链路。 如果客户端设备确定暂停是适当的，则可以由客户端设备向主机设备发送挂起请求，并且可以响应于从主机设备接收到轮询请求而发送挂起请求。 在收到挂起请求之后，主机设备可以发起暂停通信链路的操作。

    SYSTEM ON A CHIP WITH ALWAYS-ON PROCESSOR
    4.
    发明申请
    SYSTEM ON A CHIP WITH ALWAYS-ON PROCESSOR 审中-公开
    使用总线处理器的芯片系统

    公开(公告)号：WO2015183404A1

    公开(公告)日：2015-12-03

    申请号：PCT/US2015/023824

    申请日：2015-04-01

    Applicant: APPLE INC.

    Inventor： TRIPATHI, Brijesh ,  KEIL, Shane, J. ,  GULATI, Manu ,  CHO, Jung Wook ,  MACHNICKI, Erik, P. ,  HERBECK, Gilbert, H. ,  MILLET, Timothy, J. ,  DE CESARE, Joshua, P. ,  DALAL, Anand

    IPC: G06F1/32

    CPC classification number: G01D9/00 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/3293 ,  G06F13/1689 ,  Y02D10/122 ,  Y02D10/171 ,  Y02D50/20

    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

    Abstract translation: 在一个实施例中，芯片上的系统（SOC）包括当SOC的其余部分断电时保持供电的组件。 该组件可以包括用于从各种设备传感器捕获数据的传感器捕获单元，并且可以对所捕获的传感器数据进行过滤。 响应于过滤，组件可以唤醒SOC的剩余部分以允许处理。 组件可以存储可编程配置数据，与SOC最近断电时的状态相匹配，用于SOC的其他组件，以便在唤醒后重新编程它们。 在一些实施例中，组件可以被配置为唤醒SOC内的存储器控​​制器和到存储器控制器的路径，以便将数据写入存储器。 SOC的其余部分可能仍然断电。

    HOST/PERIPHERAL LOCAL INTERCONNECT THAT IS COMPATIBLE WITH SELF-CONFIGURABLE PERIPHERAL DEVICE
    5.
    发明申请
    HOST/PERIPHERAL LOCAL INTERCONNECT THAT IS COMPATIBLE WITH SELF-CONFIGURABLE PERIPHERAL DEVICE 审中-公开
    主机/外围本地互连与自配置的外围设备兼容

    公开(公告)号：WO2011019673A1

    公开(公告)日：2011-02-17

    申请号：PCT/US2010/044925

    申请日：2010-08-09

    Applicant: APPLE INC. ,  YEPEZ, Roberto, Gabriel ,  GRAESSLEY, Josh ,  CHINN, Paul ,  DALAL, Anand

    Inventor： YEPEZ, Roberto, Gabriel ,  GRAESSLEY, Josh ,  CHINN, Paul ,  DALAL, Anand

    IPC: G06F13/38

    CPC classification number: G06F13/385

    Abstract: A host/peripheral local interconnect that is compatible with a self- configurable peripheral device is described. According to processes discussed herein, the peripheral device is self-configured. The host device may be kept aware of the self-configured state of the peripheral device, and/or self-configured changes made at the peripheral device. The host device may scale its applications/uses of the peripheral device in light of such awareness.

    Abstract translation: 描述了与自配置的外围设备兼容的主机/外设本地互连。 根据本文讨论的过程，外围设备是自配置的。 可以保持主机设备了解外围设备的自配置状态和/或外围设备进行的自配置更改。 主机设备可以根据这种意识来扩展其外围设备的应用/使用。

    SYSTEM ON A CHIP WITH ALWAYS-ON PROCESSOR
    9.
    发明公开
    SYSTEM ON A CHIP WITH ALWAYS-ON PROCESSOR 审中-公开
    系统AUF EINEM CHIP MIT STETS EINGESCHALTETEM PROZESSOR

    公开(公告)号：EP3146408A1

    公开(公告)日：2017-03-29

    申请号：EP15716364.3

    申请日：2015-04-01

    Applicant: Apple Inc.

    Inventor： TRIPATHI, Brijesh ,  KEIL, Shane J. ,  GULATI, Manu ,  CHO, Jung Wook ,  MACHNICKI, Erik P. ,  HERBECK, Gilbert H. ,  MILLET, Timothy J. ,  DE CESARE, Joshua P. ,  DALAL, Anand

    IPC: G06F1/32

    CPC classification number: G01D9/00 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/3293 ,  G06F13/1689 ,  Y02D10/122 ,  Y02D10/171 ,  Y02D50/20

    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

    Abstract translation: 在一个实施例中，芯片上的系统（SOC）包括当SOC的其余部分断电时保持供电的组件。 该组件可以包括用于从各种设备传感器捕获数据的传感器捕获单元，并且可以过滤所捕获的传感器数据。 响应于过滤，组件可以唤醒SOC的剩余部分以允许处理。 组件可以存储可编程配置数据，与SOC最近断电时的状态相匹配，用于SOC的其他组件，以便在唤醒后重新编程它们。 在一些实施例中，组件可以被配置为唤醒SOC内的存储器控​​制器和到存储器控制器的路径，以便将数据写入存储器。 SOC的其余部分可能仍然断电。

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