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    SILICON-ON-INSULATOR STRUCTURES AND METHODS
    1.
    发明申请
    SILICON-ON-INSULATOR STRUCTURES AND METHODS 审中-公开

    公开(公告)号：WO2003096385A3

    公开(公告)日：2003-11-20

    申请号：PCT/US2003/014314

    申请日：2003-05-07

    Applicant: ASM AMERICA, INC.

    Inventor： WERKHOVEN, Chris ,  RAAIJMAKERS, Ivo ,  ARENA, Chantal

    IPC: H01L27/01

    Abstract: Silicon-on-insulator (SOI) structures are provided by forming a single-crystal insulator over a substrate, followed by heteroepitaxy of a semiconductor layer thereover. Atomic layer deposition (ALD) is preferably used to form an amorphous insulator, followed by solid phase epitaxy to convert the layer into a single-crystal structure. Advantageously, the crystalline insulator has a lattice structure and lattice constant closely matching that of the semiconductor formed over it, and a ternary insulating material facilitates matching properties of the layers. Strained silicon can be formed without need for a buffer layer. An amorphous SiO 2 layer can optionally be grown underneath the insulator. In addition, a buffer layer can be grown, either between the substrate and the insulator or between the insulator and the semiconductor layer, to produce desired strain in the active semiconductor layer.

    SIGE RECTIFICATION PROCESS
    3.
    发明申请
    SIGE RECTIFICATION PROCESS 审中-公开

    公开(公告)号：WO2004081987A3

    公开(公告)日：2004-09-23

    申请号：PCT/US2004/007386

    申请日：2004-03-11

    Applicant: ASM AMERICA, INC. ,  ARENA, Chantal ,  TOMASINI, Pierre ,  CODY, Nyles

    Inventor： ARENA, Chantal ,  TOMASINI, Pierre ,  CODY, Nyles

    IPC: H01L21/20

    Abstract: A method for forming strain-relaxed SiGe films comprises depositing a graded strained SiGe layer on a substrate in which the concentration of Ge is greater at the interface with the substrate than at the top of the layer (Figure 1). The strained SiGe film is subsequently oxidized, producing a strain-relaxed SiGe film with a substantially uniform Ge concentration across the thickness of the film. The relaxed SiGe layer may be used to form a strained silicon layer on a substrate.

    METHOD TO PLANARIZE AND REDUCE DEFECT DENSITY OF SILICON GERMANIUM
    5.
    发明申请
    METHOD TO PLANARIZE AND REDUCE DEFECT DENSITY OF SILICON GERMANIUM 审中-公开
    平面化和减少硅锗缺陷密度的方法

    公开(公告)号：WO2004081986A2

    公开(公告)日：2004-09-23

    申请号：PCT/US2004/007385

    申请日：2004-03-11

    Applicant: ASM AMERICA INC. ,  TOMASINI, Pierre ,  CODY, Nyles ,  ARENA, Chantal

    Inventor： TOMASINI, Pierre ,  CODY, Nyles ,  ARENA, Chantal

    IPC: H01L

    CPC classification number: H01L21/02532 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0262 ,  H01L21/02639

    Abstract: A method for blanket depositing a SiGe film (30) comprises intermixing a silicon source, a germanium source and an etchant to form a gaseous precursor mixture. The method further comprises flowing the gaseous precursor mixture over a substrate (10) under chemical vapor deposition conditions to deposit a blanket layer of epitaxial SiGe (30) onto the substrate (10), whether patterned or un-patterned.

    Abstract translation: 用于毯式沉积SiGe膜（30）的方法包括混合硅源，锗源和蚀刻剂以形成气态前体混合物。 该方法还包括在化学气相沉积条件下使气态前体混合物在衬底（10）上流动，以在衬底（10）上沉积外延SiGe（30）的覆盖层，无论是图案化的还是未图案化的。

    SILICON-ON-INSULATOR STRUCTURES AND METHODS
    6.
    发明申请
    SILICON-ON-INSULATOR STRUCTURES AND METHODS 审中-公开
    硅绝缘体结构和方法

    公开(公告)号：WO2003096385A2

    公开(公告)日：2003-11-20

    申请号：PCT/US2003/014314

    申请日：2003-05-07

    Applicant: ASM AMERICA, INC.

    Inventor： WERKHOVEN, Chris ,  RAAIJMAKERS, Ivo ,  ARENA, Chantal

    IPC: H01L

    CPC classification number: H01L21/31662 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/02356 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/3141 ,  H01L21/7624 ,  H01L21/76262

    Abstract: Silicon-on-insulator (SOI) structures are provided by forming a single-crystal insulator over a substrate, followed by heteroepitaxy of a semiconductor layer thereover. Atomic layer deposition (ALD) is preferably used to form an amorphous insulator, followed by solid phase epitaxy to convert the layer into a single-crystal structure. Advantageously, the crystalline insulator has a lattice structure and lattice constant closely matching that of the semiconductor formed over it, and a ternary insulating material facilitates matching properties of the layers. Strained silicon can be formed without need for a buffer layer. An amorphous SiO 2 layer can optionally be grown underneath the insulator. In addition, a buffer layer can be grown, either between the substrate and the insulator or between the insulator and the semiconductor layer, to produce desired strain in the active semiconductor layer.

    Abstract translation: 通过在衬底上形成单晶绝缘体，然后在其上进行异质外延半导体层来提供绝缘体上硅（SOI）结构。 原子层沉积（ALD）优选用于形成非晶绝缘体，随后进行固相外延将层转化为单晶结构。 有利地，结晶绝缘体具有与其上形成的半导体的晶格结构和晶格常数紧密匹配的晶格绝缘体，并且三元绝缘材料有助于层的匹配性质。 可以形成应变硅，而不需要缓冲层。 可以任选地在绝缘体下生长非晶SiO 2层。 此外，可以在衬底和绝缘体之间或绝缘体和半导体层之间生长缓冲层，以在有源半导体层中产生期望的应变。

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