-
公开(公告)号:WO2002064853A3
公开(公告)日:2002-08-22
申请号:PCT/US2002/004751
申请日:2002-02-12
Applicant: ASM AMERICA, INC.
Inventor: TODD, Michael, A. , RAAIJMAKERS, Ivo
IPC: H01L21/205
Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize trisilane as a silicon source. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.
-
公开(公告)号:WO2003096385A3
公开(公告)日:2003-11-20
申请号:PCT/US2003/014314
申请日:2003-05-07
Applicant: ASM AMERICA, INC.
Inventor: WERKHOVEN, Chris , RAAIJMAKERS, Ivo , ARENA, Chantal
IPC: H01L27/01
Abstract: Silicon-on-insulator (SOI) structures are provided by forming a single-crystal insulator over a substrate, followed by heteroepitaxy of a semiconductor layer thereover. Atomic layer deposition (ALD) is preferably used to form an amorphous insulator, followed by solid phase epitaxy to convert the layer into a single-crystal structure. Advantageously, the crystalline insulator has a lattice structure and lattice constant closely matching that of the semiconductor formed over it, and a ternary insulating material facilitates matching properties of the layers. Strained silicon can be formed without need for a buffer layer. An amorphous SiO 2 layer can optionally be grown underneath the insulator. In addition, a buffer layer can be grown, either between the substrate and the insulator or between the insulator and the semiconductor layer, to produce desired strain in the active semiconductor layer.
-
公开(公告)号:WO2002045167A3
公开(公告)日:2002-06-06
申请号:PCT/US2001/044350
申请日:2001-11-26
Applicant: ASM MICROCHEMISTRY OY , ASM AMERICA, INC. , HUJANEN, Juha , RAAIJMAKERS, Ivo
Inventor: HUJANEN, Juha , RAAIJMAKERS, Ivo
IPC: H01L43/12
Abstract: Methods are provided for forming uniformly thin layers in magnetic devices. Atomic layer deposition (ALD) can produce layers that are uniformly thick on an atomic scale. Magnetic tunnel junction dielectrics, for example, can be provided with perfect uniformity in thickness of 4 monolayers or less. Furthermore, conductive layers, including magnetic 12, 16 and non-magnetic layers 14, can be provided by ALD without spiking and other non-uniformity problems. The disclosed methods include forming metal oxide layers by multiple cycles of ALD and subsequently reducing the oxides to metal. The oxides tend to maintain more stable interfaces during formation.
-
公开(公告)号:WO2004040642A1
公开(公告)日:2004-05-13
申请号:PCT/US2003/033214
申请日:2003-10-21
Applicant: ASM AMERICA, INC. , ASM INTERNATIONAL N.V.
Inventor: RAAIJMAKERS, Ivo , SOININEN, Pekka, J. , ELERS, Kai-Erik
IPC: H01L21/768
CPC classification number: H01L21/76846 , C23C16/0272 , H01L21/28562 , H01L21/32051 , H01L21/76856 , H01L21/76879 , H01L23/53238 , H01L2924/0002 , H01L2924/00
Abstract: A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a semiconductor substrate. A substrate comprising a first film, which is one of a diffusion barrier film or a metal film, with the first film being exposed at least at part of the surface area of the substrate, is exposed to an oxygen-containing reactant to create a surface termination of about one monolayer of oxygen-containing groups or oxygen atoms on the exposed parts of the first film. Then the second film, which is the other one of a diffusion barrier film and a metal film, is deposited onto the substrate. Furthermore, an oxygen bridge structure is proposed, the structure comprising a diffusion barrier film and a metal film having an interface with the diffusion barrier film, wherein the interface comprises a monolayer of oxygen atoms.
Abstract translation: 提出了改善扩散阻挡膜和金属膜之间的粘合性的方法。 扩散阻挡膜和金属膜都可以以任一顺序沉积到半导体衬底上。 包含第一膜,其是扩散阻挡膜或金属膜之一,其中第一膜至少部分地暴露于基底的表面区域,以暴露于含氧反应物以形成表面 在第一膜的暴露部分上终止约一个单层的含氧基团或氧原子。 然后将作为扩散阻挡膜和金属膜中的另一个的第二膜沉积在基板上。 此外,提出了氧桥结构,其结构包括扩散阻挡膜和与扩散阻挡膜具有界面的金属膜,其中界面包括单层氧原子。
-
公开(公告)号:WO2003096385A2
公开(公告)日:2003-11-20
申请号:PCT/US2003/014314
申请日:2003-05-07
Applicant: ASM AMERICA, INC.
Inventor: WERKHOVEN, Chris , RAAIJMAKERS, Ivo , ARENA, Chantal
IPC: H01L
CPC classification number: H01L21/31662 , H01L21/02178 , H01L21/02192 , H01L21/02194 , H01L21/0228 , H01L21/02356 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/02505 , H01L21/0251 , H01L21/02513 , H01L21/02532 , H01L21/0262 , H01L21/02658 , H01L21/3141 , H01L21/7624 , H01L21/76262
Abstract: Silicon-on-insulator (SOI) structures are provided by forming a single-crystal insulator over a substrate, followed by heteroepitaxy of a semiconductor layer thereover. Atomic layer deposition (ALD) is preferably used to form an amorphous insulator, followed by solid phase epitaxy to convert the layer into a single-crystal structure. Advantageously, the crystalline insulator has a lattice structure and lattice constant closely matching that of the semiconductor formed over it, and a ternary insulating material facilitates matching properties of the layers. Strained silicon can be formed without need for a buffer layer. An amorphous SiO 2 layer can optionally be grown underneath the insulator. In addition, a buffer layer can be grown, either between the substrate and the insulator or between the insulator and the semiconductor layer, to produce desired strain in the active semiconductor layer.
Abstract translation: 通过在衬底上形成单晶绝缘体,然后在其上进行异质外延半导体层来提供绝缘体上硅(SOI)结构。 原子层沉积(ALD)优选用于形成非晶绝缘体,随后进行固相外延将层转化为单晶结构。 有利地,结晶绝缘体具有与其上形成的半导体的晶格结构和晶格常数紧密匹配的晶格绝缘体,并且三元绝缘材料有助于层的匹配性质。 可以形成应变硅,而不需要缓冲层。 可以任选地在绝缘体下生长非晶SiO 2层。 此外,可以在衬底和绝缘体之间或绝缘体和半导体层之间生长缓冲层,以在有源半导体层中产生期望的应变。
-
公开(公告)号:WO2003016587A1
公开(公告)日:2003-02-27
申请号:PCT/US2002/026192
申请日:2002-08-15
Applicant: ASM MICROCHEMISTRY OY , ASM AMERICA, INC,
Inventor: KILPELA, Olli , SAANILA, Ville , LI, Wei-Min , ELERS, Kai-Erik , KOSTAMO, Juhana , RAAIJMAKERS, Ivo , GRANNEMAN, Ernst
IPC: C23C16/00
CPC classification number: C23C16/45544 , C23C16/4412 , C23C16/452 , C23C16/45514 , C23C16/45536 , C23C16/45565 , C23C16/45589 , C23C16/507 , C23C16/509
Abstract: Various reactors for growing thin films on a substrate (16) by subjecting the substrate (16) to alternately repeated surface reactions of vapor-phase reactants are disclosed. In one embodiment, the reactor (12) comprises a reaction chamber (14). A showerhead plate (67) divides the reaction chamber (14) into upper and lower parts. A first precursor is directed towards the lower half of the reaction chamber (14) and a second precursor is directed towards the upper half of the reaction chamber (14). The substrate (16) is disposed within the lower half of the reaction chamber (14). The showerhead plate (67) includes plurality passages (72) such that the upper half is in communication with the lower half of the reaction chamber (14). In another arrangement, the reaction chamber (14) includes a shutter plate (120). In other arrangements, the showerhead plate (67) is arranged to modify the local flow patterns of the gases flowing through the reaction chamber (14).
Abstract translation: 公开了通过使衬底(16)交替重复气相反应的表面反应来在衬底(16)上生长薄膜的各种反应器。 在一个实施例中,反应器(12)包括反应室(14)。 喷头板(67)将反应室(14)分成上部和下部。 第一前体指向反应室(14)的下半部分,第二前体指向反应室(14)的上半部分。 基板(16)设置在反应室(14)的下半部内。 喷头板(67)包括多个通道(72),使得上半部分与反应室(14)的下半部连通。 在另一布置中,反应室(14)包括挡板(120)。 在其他布置中,喷头板(67)布置成改变流过反应室(14)的气体的局部流动模式。
-
7.
公开(公告)号:WO2002064853A2
公开(公告)日:2002-08-22
申请号:PCT/US2002/004751
申请日:2002-02-12
Applicant: ASM AMERICA, INC.
Inventor: TODD, Michael, A. , RAAIJMAKERS, Ivo
IPC: C23C16/00
CPC classification number: C23C16/0272 , B82Y10/00 , B82Y30/00 , C23C16/22 , C23C16/24 , C23C16/30 , C23C16/308 , C23C16/325 , C23C16/345 , C23C16/36 , C23C16/56 , C30B25/02 , C30B29/06 , H01L21/02422 , H01L21/0243 , H01L21/0245 , H01L21/0251 , H01L21/02529 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02592 , H01L21/02595 , H01L21/02598 , H01L21/0262 , H01L21/02667 , H01L21/2257 , H01L21/28035 , H01L21/28044 , H01L21/28194 , H01L21/28525 , H01L21/28556 , H01L21/3185 , H01L21/32055 , H01L28/84 , H01L29/127 , H01L29/51 , H01L29/517 , H01L29/518 , H01L29/66181 , H01L29/66242 , H01L31/1804 , H01L31/182 , H01L31/202 , Y02E10/546 , Y02E10/547 , Y02P70/521 , Y10S438/933
Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize trisilane as a silicon source. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.
Abstract translation: 通过使用丙硅烷作为硅源的沉积方法制备薄的平滑的含硅膜。 在优选的实施方案中,该方法产生连续的并且具有约150或更小的厚度,大约5范围或更小的表面粗糙度和约20%或更小的厚度不均匀性的含Si薄膜。 当与其它元素掺杂或合金化时,优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率,并且可以用于制备各种有用的结构,例如润湿层,HSG硅,量子点,电介质层,抗反射涂层(ARC),栅电极和扩散源。
-
8.
公开(公告)号:WO2004084268A2
公开(公告)日:2004-09-30
申请号:PCT/US2004/007564
申请日:2004-03-12
Applicant: ASM AMERICA, INC. , BRABANT, Paul, D. , ITALIANO, Joseph, P. , ARENA, Chantal, J. , TOMASINI, Pierre , RAAIJMAKERS, Ivo , BAUER, Matthias
Inventor: BRABANT, Paul, D. , ITALIANO, Joseph, P. , ARENA, Chantal, J. , TOMASINI, Pierre , RAAIJMAKERS, Ivo , BAUER, Matthias
IPC: H01L
CPC classification number: C30B29/08 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02532 , H01L21/02576 , H01L21/0262 , H01L21/02661
Abstract: Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing (305) to lower deposition temperatures (315) for Ge-containing layers, Si or Ge compounds are provided (310) to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers (110) result. Retrograded relaxed SiGe (115) is also provided between a relaxed, high Ge-content seed layer (110) and an overlying strained layer (120).
Abstract translation: 用于沉积诸如外延Ge和SiGe膜的外延膜的方法。 在对于含锗层从高温处理(305)到较低沉积温度(315)的冷却期间,向基板提供(310)Si或Ge化合物。 产生平滑,薄,相对缺陷的Ge或SiGe层(110)。 在弛豫的高Ge含量种子层(110)和上覆应变层(120)之间还提供了退化的松弛SiGe(115)。
-
公开(公告)号:WO2004049432A2
公开(公告)日:2004-06-10
申请号:PCT/US2003/040061
申请日:2003-11-21
Applicant: ASM AMERICA, INC. , ASM INTERNATIONAL N.V.
Inventor: RAAIJMAKERS, Ivo , SOININEN, Pekka, J. , GRANNEMAN, Ernst , HAUKKA, Suvi , ELERS, Kai-Erik , TUOMINEN, Marco , SPREY, Hessel , TERHORST, Herbert , HENDRIKS, Menso
IPC: H01L23/00
CPC classification number: H01L21/76843 , H01L21/28556 , H01L21/28562 , H01L21/7681 , H01L21/76814 , H01L21/7682 , H01L21/76825 , H01L21/76828 , H01L21/76831 , H01L21/76844 , H01L21/76864 , H01L21/76873 , H01L23/5226 , H01L23/53238 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits, and particularly of openings formed in porous materials. Trenches and contact vias are formed in insulating layers. The pores on the sidewalls of the trenches and vias are blocked, and then the structure is exposed to alternating chemistries to form monolayers of a desired lining material. In exemplary process flows chemical or physical vapor deposition (CVD or PVD) of a sealing layer blocks the pores due to imperfect conformality. An alternating process can also be arranged by selection of pulse separation and/or pulse duration to achieve reduced conformality relative to a self-saturating, self-limiting atomic layer deposition (ALD) process. In still another arrangement, layers with anisotropic pore structures can be sealed by selectively melting upper surfaces. Blocking is followed by a self-limiting, self-saturating atomic layer deposition (ALD) reactions without significantly filling the pores.
Abstract translation: 提供了用于集成电路中的双镶嵌结构的保形衬里的方法和结构,并且尤其提供了在多孔材料中形成的开口。 沟槽和接触过孔在绝缘层中形成。 沟槽和通孔侧壁上的孔被阻塞,然后该结构暴露于交替化学反应以形成所需衬里材料的单层。 在示例性工艺流程中,由于不完全的共形性,密封层的化学或物理气相沉积(CVD或PVD)阻塞孔隙。 也可以通过选择脉冲间隔和/或脉冲持续时间来安排交替工艺,以相对于自饱和自限原子层沉积(ALD)工艺实现降低的共形性。 在又一种布置中,具有各向异性孔结构的层可通过选择性地熔化上表面来密封。 封闭之后是自我限制的自饱和原子层沉积(ALD)反应,没有显着填充孔。 p>
-
10.
公开(公告)号:WO2002067319A2
公开(公告)日:2002-08-29
申请号:PCT/US2001/047592
申请日:2001-12-05
Applicant: ASM MICROCHEMISTRY OY , ASM AMERICA, INC. , KIM, Ki-Bum , RAAIJMAKERS, Ivo , SOININEN, Pekka, J.
Inventor: KIM, Ki-Bum , RAAIJMAKERS, Ivo , SOININEN, Pekka, J.
IPC: H01L21/768
CPC classification number: H01L21/76846 , H01L21/28562 , H01L21/76855 , H01L21/76856 , H01L21/76858 , H01L23/53238 , H01L2924/0002 , H01L2924/00
Abstract: The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.
Abstract translation: 本发明提供一种制造半导体器件的方法,其可以通过铜互连促进半导体器件的商业化。 在金属互连线制造的过程中,与Al中间层结合的TiN薄膜用作沟槽或通孔壁上的扩散阻挡层。 为了形成,Al沉积在TiN薄膜上,随后铜填充沟槽。 Al扩散到TiN层并与氧或氮反应,这将有效地吸收晶界,从而阻止铜的扩散。
-
-
-
-
-
-
-
-
-