公开(公告)号：WO2018106955A1

公开(公告)日：2018-06-14

申请号：PCT/US2017/065170

申请日：2017-12-07

Applicant: ASM IP HOLDING B.V. ,  ASM AMERICA, INC.

Inventor： BLOMBERG, Tom, E. ,  ZHU, Chiyu ,  TUOMINEN, Marko, J. ,  HAUKKA, Suvi, P. ,  SHARMA, Varun

IPC: H01L21/3065 ,  H01L29/20 ,  H01J37/32 ,  H01L21/306

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.