公开(公告)号：WO2015094549A2

公开(公告)日：2015-06-25

申请号：PCT/US2014/066310

申请日：2014-11-19

Applicant: ASM IP HOLDING B.V. ,  ASM AMERICA, INC.

Inventor： HAUKKA, Suvi, P. ,  TANG, Fu ,  GIVENS, Michael, E. ,  MAES, Jan, Willem ,  XIE, Qi

IPC: H01L21/02

CPC classification number: H01L21/02568 ,  C23C16/0227 ,  C23C16/305 ,  C23C16/45525 ,  H01L21/02557 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28264

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

Abstract translation: 在一些方面，提供了形成金属硫化物薄膜的方法。 根据一些方法，金属硫化物薄膜以循环方法沉积在反应空间中的基底上，其中至少一个循环包括交替地且顺序地使基底与第一气相金属反应物和第二气相硫 反应物。 在一些方面中，提供了在衬底表面上形成三维结构的方法。 在一些实施例中，该方法包括在基板表面上形成金属硫化物薄膜并在金属硫化物薄膜上形成覆盖层。 衬底表面可以包括高迁移率通道。

公开(公告)号：WO2018106955A1

公开(公告)日：2018-06-14

申请号：PCT/US2017/065170

申请日：2017-12-07

Applicant: ASM IP HOLDING B.V. ,  ASM AMERICA, INC.

Inventor： BLOMBERG, Tom, E. ,  ZHU, Chiyu ,  TUOMINEN, Marko, J. ,  HAUKKA, Suvi, P. ,  SHARMA, Varun

IPC: H01L21/3065 ,  H01L29/20 ,  H01J37/32 ,  H01L21/306

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：WO2015094551A1

公开(公告)日：2015-06-25

申请号：PCT/US2014/066316

申请日：2014-11-19

Applicant: ASM IP HOLDING B.V.

Inventor： HAUKKA, Suvi, P. ,  TANG, Fu ,  GIVENS, Michael, E. ,  MAES, Jan, William ,  XIE, Qi

IPC: C23C16/06

CPC classification number: H01L21/02175 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/02334 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/02557 ,  H01L21/02568 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28264 ,  H01L29/2203 ,  H01L29/267 ,  H01L29/66795 ,  H01L29/7786 ,  H01L29/78

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

Abstract translation: 在一些方面，提供了形成金属硫化物薄膜的方法。 根据一些方法，金属硫化物薄膜在循环过程中在反应空间中沉积在基底上，其中至少一个循环包括交替地和顺序地接触基底与第一气相金属反应物和第二气相硫 反应物。 在一些方面，提供了在衬底表面上形成三维结构的方法。 在一些实施方案中，该方法包括在基材表面上形成金属硫化物薄膜，并在金属硫化物薄膜上形成覆盖层。 衬底表面可以包括高迁移率通道。

公开(公告)号：WO2009129332A2

公开(公告)日：2009-10-22

申请号：PCT/US2009/040705

申请日：2009-04-15

Applicant: ASM AMERICA, INC.

Inventor： LI, Dong ,  MARCUS, Steven ,  HAUKKA, Suvi, P. ,  LI, Wei-Min

IPC: H01L21/205 ,  H01L21/336 ,  H01L21/28 ,  H01L21/3205

CPC classification number: C23C16/32 ,  C23C16/45527 ,  H01L21/28088 ,  H01L21/28273 ,  H01L21/28562 ,  H01L21/76843 ,  H01L29/4966

Abstract: Methods of forming metal carbide films are provided. In some embodiments, a substrate is exposed to alternating pulses of a transition metal species and an aluminum hydrocarbon compound, such as TMA, DMAH, or TEA. The aluminum hydrocarbon compound is selected to achieve the desired properties of the metal carbide film, such as aluminum concentration, resistivity, adhesion and oxidation resistance. In some embodiments, the methods are used to form a metal carbide layer that determines the work function of a control gate in a flash memory.

Abstract translation: 提供了形成金属碳化物膜的方法。 在一些实施方案中，将基底暴露于过渡金属物质和铝烃化合物（例如TMA，DMAH或TEA）的交替脉冲。 选择铝烃化合物以实现金属碳化物膜的所需性质，例如铝浓度，电阻率，粘附性和抗氧化性。 在一些实施例中，所述方法用于形成确定闪速存储器中的控制栅极的功函数的金属碳化物层。

公开(公告)号：WO2011156705A2

公开(公告)日：2011-12-15

申请号：PCT/US2011/039970

申请日：2011-06-10

Applicant: ASM INTERNATIONAL N.V. ,  ASM AMERICA, INC. ,  HAUKKA, Suvi, P. ,  NISSKANEN, Antti ,  TUOMINEN, Marko

Inventor： HAUKKA, Suvi, P. ,  NISSKANEN, Antti ,  TUOMINEN, Marko

IPC: H01L21/28 ,  H01L21/20

CPC classification number: H01L21/7685 ,  C23C16/0227 ,  C23C16/14 ,  C23C16/45525 ,  H01L21/02068 ,  H01L21/02697 ,  H01L21/28562 ,  H01L21/32051 ,  H01L21/32053 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76883

Abstract: Metallic layers can be selectively deposited on surfaces of a substrate relative to a second surface of the substrate. In preferred embodiments, the metallic layers are selectively deposited on copper instead of insulating or dielectric materials. In preferred embodiments, a first precursor forms a layer or adsorbed species on the first surface and is subsequently reacted or converted to form a metallic layer. Preferably the deposition temperature is selected such that a selectivity of above about 90% is achieved.

Abstract translation: 金属层可以相对于基板的第二表面选择性地沉积在基板的表面上。 在优选实施例中，金属层选择性地沉积在铜上，而不是绝缘或介电材料。 在优选的实施方案中，第一前体在第一表面上形成层或吸附的物质，随后反应或转化以形成金属层。 优选选择沉积温度使得达到高于约90％的选择性。

公开(公告)号：WO2003041124A3

公开(公告)日：2003-05-15

申请号：PCT/US2002/027230

申请日：2002-08-26

Applicant: ASM AMERICA, INC. ,  ASM MICROCHEMISTRY OY ,  HAUKKA, Suvi, P. ,  SHERO, Eric ,  POMAREDE, Chritophe, F. ,  HUBERT MAES, Jan, Willem ,  TUOMINEN, Marko

Inventor： HAUKKA, Suvi, P. ,  SHERO, Eric ,  POMAREDE, Chritophe, F. ,  HUBERT MAES, Jan, Willem ,  TUOMINEN, Marko

IPC: H01L21/28

Abstract: The present invention relates to methods for forming dielectric layers on a substrate, such as in an integrated circuit. In one aspect of the invention, a thin interfacial layer is formed (30). The interfacial layer is preferably an oxide layer and a high-k material is preferably deposited on the interfacial layer by a process that does not cause substantial further growth of the interfacial layer. For example, water vapor may be used as an oxidant source during high-k deposition at less than or equal to about 300°C.

公开(公告)号：EP1221177A1

公开(公告)日：2002-07-10

申请号：EP00957751.1

申请日：2000-08-24

Applicant: ASM America, Inc.

Inventor： RAAIJMAKERS, Ivo ,  HAUKKA, Suvi, P. ,  GRANNEMAN, Ernst, H., A. ,  SAANILA, Ville, Antero ,  SOININEN, Pekka, Juha ,  ELERS, Kai-Erik

IPC: H01L21/768 ,  H01L23/532 ,  C23C16/00

CPC classification number: C23C16/45525 ,  C23C16/0272 ,  C23C16/045 ,  C23C16/08 ,  C23C16/32 ,  C23C16/44 ,  C30B25/02 ,  C30B29/02 ,  C30B29/36 ,  H01L21/28562 ,  H01L21/7681 ,  H01L21/76843 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches (60) and contact vias (62) are formed (100) in insulating layers (60, 56). The trenches (60) and vias (62) are exposed to alternating chemistries to form monolayers of a desired lining material (150). Exemplary process flows include alternately pulsed metal halide (104) and ammonia gases (108) injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal (160) for any given trench and via dimensions.

Abstract translation: 提供了用于集成电路中的双镶嵌结构的共形衬里的方法和结构。 在绝缘层（60,56）中形成沟槽（60）和接触孔（62）（100）。 沟槽（60）和通孔（62）暴露于交替的化学物质以形成期望的内衬材料（150）的单层。 示例性的工艺流程包括交替地将脉冲金属卤化物（104）和氨气（108）注入恒定的载体流中。 自终止的金属层因此与氮反应。 对于任何给定的沟槽和通孔尺寸，近乎完美的台阶覆盖允许扩散屏障功能的最小厚度，从而最大化随后的填充金属（160）的体积。

公开(公告)号：EP1221178A1

公开(公告)日：2002-07-10

申请号：EP00973583.8

申请日：2000-10-16

Applicant: ASM America, Inc.

Inventor： ELERS, Kai-Erik ,  HAUKKA, Suvi, P. ,  SAANILA, Ville, Antero ,  KAIPIO, Sari, Johanna ,  SOININEN, Pekka, Juha

IPC: H01L21/768 ,  H01L21/285 ,  C23C16/00

CPC classification number: C30B29/38 ,  C23C16/32 ,  C23C16/44 ,  C23C16/4401 ,  C23C16/45529 ,  C23C16/45534 ,  C30B25/02 ,  C30B29/02 ,  C30B29/36 ,  H01L21/28568 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76877

Abstract: The present method provides tools for growing conformal metal nitride, metal carbide and metal thin films, and nanolaminate structures incorporating these films, from aggressive chemicals. The amount of corrosive chemical compounds, such as hydrogen halides, is reduced during the deposition of transition metal, transition metal carbide and transition metal nitride thin films on various surfaces, such as metals and oxides. Getter compounds protect surfaces sensitive to hydrogen halides and ammonium halides, such as aluminum, copper, silicon oxide and the layers being deposited, against corrosion. Nanolaminate structures (20) incorporating metal nitrides, such as titanium nitride (30) and tungsten nitride (40), and metal carbides, and methods for forming the same, are also disclosed.

Abstract translation: 本发明方法提供用于生长的保形金属氮化物，金属碳化物和金属薄膜，以及纳米叠层结构并入本文膜，从腐蚀性化学物质的工具。 腐蚀性的化学化合物，颜色的量：如金属和氧化物：如卤化氢，过渡金属，过渡金属碳化物和过渡金属氮化物在各种表面上的薄膜，颜色的沉积过程中被降低。 吸气剂化合物保护表面以氢和铵卤化物卤化物,:如铝，铜，氧化硅和所述层敏感沉积，防止腐蚀。 Nanolaminates结构（20）包含金属氮化物，氮化钛：如（30）和氮化钨（40），和金属碳化物，以及用于形成其的方法，然后，是游离缺失盘。

公开(公告)号：EP1266054A2

公开(公告)日：2002-12-18

申请号：EP01918295.5

申请日：2001-03-02

Applicant: ASM America, Inc.

Inventor： WERKHOVEN, Christiaan, J. ,  RAAIJMAKERS, Ivo ,  HAUKKA, Suvi, P.

IPC: C30B25/14 ,  C23C16/44 ,  H01L21/205

CPC classification number: H01L21/28185 ,  C23C16/029 ,  C23C16/34 ,  C23C16/401 ,  C23C16/403 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/45534 ,  C30B25/14 ,  H01L21/0214 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28562 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/3185 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L2221/1089 ,  H01L2924/0002 ,  Y10T428/24942 ,  Y10T428/2495 ,  H01L2924/00

Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles (301) or (450, 455, 460, 470) including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources (306 or 460) are introduced during the cyclical process. A graded gate dielectric (72) is thereby provided, even for extremely thin layers. The gate dielectric (72) as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric (72) can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (432) (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g., in separate pulses, and the copper source pulses (460) can gradually increase in frequency, forming a graded transition region (434), until pure copper (436) is formed at the upper surface. Advantageously, graded compositions in these and a variety of other contexts help to avoid such problems as etch rate control, electromigration and non-ohmic electrical contact that can occur at sharp material interfaces.

公开(公告)号：EP1206799A1

公开(公告)日：2002-05-22

申请号：EP00955875.0

申请日：2000-08-24

Applicant: ASM America, Inc.

Inventor： SATTA, Alessandra ,  MAEX, Karen ,  ELERS, Kai-Erik ,  SAANILA, Ville, Antero ,  SOININEN, Pekka, Juha ,  HAUKKA, Suvi, P.

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/285 ,  C23C16/00

CPC classification number: H01L21/76814 ,  C23C16/0272 ,  C23C16/045 ,  C23C16/08 ,  C23C16/32 ,  C23C16/44 ,  C23C16/45525 ,  C30B25/02 ,  C30B29/02 ,  C30B29/36 ,  H01L21/28562 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76838 ,  H01L21/76844 ,  H01L21/76876 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods are disclosed for selective deposition on desired materials. In particular, barrier materials are selectively formed on insulating surfaces, as compared to conductive surfaces. In the context of contact formation and trench fill, particularly damascene and dual damascene metallization, the method advantageously lines insulating surfaces with a barrier material. The selective formation allows the deposition to be "bottomless," thus leaving the conductive material at a via bottom exposed for direct metal-to-metal contact when further conductive material is deposited into the opening after barrier formation on the insulating surfaces. Desirably, the selective deposition is accomplished by atomic layer deposition (ALD), resulting in highly conformal coverage of the insulating sidewalls in the opening.