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    Key caching system
    1.
    发明专利
    Key caching system 未知

    公开(公告)号：AU9089501A

    公开(公告)日：2002-03-26

    申请号：AU9089501

    申请日：2001-09-14

    Applicant: ATHEROS COMM INC

    Inventor： KUSKIN JEFFREY SCOTT ,  NG TAO-FEI SAMUEL ,  DHAMDHERE DEEPAK PRABHAKAR ,  CAIN FIONA J ,  DAVIDSON ANDREW M

    IPC: H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/12

    Abstract: A key-caching system retrieves actively used keys from a relatively fast cache memory for fast processing of wireless communications. Additional keys are stored in relatively slow system memory that has high storage capacity. As keys become needed for active use, the keys are retrieved from the system memory and stored in the cache memory. By using active memory for keys actively being used, system performance is enhanced. By using system memory for keys not being used, a greater number of keys are available for transfer to the cache and subsequent active use.

    3.
    发明专利
    未知

    公开(公告)号：DE60141968D1

    公开(公告)日：2010-06-10

    申请号：DE60141968

    申请日：2001-09-12

    Applicant: ATHEROS COMM INC

    Inventor： DAVIDSON ANDREW M ,  NG TAO-FEI S ,  KUSKIN JEFFREY SCOTT ,  DHAMDHERE DEEPAK PRABHAKAR ,  CAIN FIONA J

    IPC: H04L12/28 ,  H04W28/12 ,  H04L29/08 ,  H04W24/00 ,  H04W28/10 ,  H04W72/12 ,  H04W84/18

    Abstract: Systems and methods to provide ordered transmission of data packets to multiple destinations are presented. A transmission device includes a transmitter, a data packet ordering unit, a state table, and a transmit management interface such as a hardware/software unit. The state table stores a transmit block status of each destination. The transmit management interface is coupled to the transmitter and analyzes data packets. The transmit management interface determines whether to transmit a data packet targeted to a particular destination or to block transmission of data packets to the particular destination by examining the transmit block status of the particular destination from the state table.

    KEY CACHING SYSTEM
    4.
    发明专利
    KEY CACHING SYSTEM 未知

    公开(公告)号：CA2422476A1

    公开(公告)日：2002-03-21

    申请号：CA2422476

    申请日：2001-09-14

    Applicant: ATHEROS COMM INC

    Inventor： DHAMDHERE DEEPAK PRABHAKAR ,  DAVIDSON ANDREW M ,  NG TAO-FEI SAMUEL ,  KUSKIN JEFFREY SCOTT ,  CAIN FIONA J

    IPC: H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/12

    Abstract: A key-caching system retrieves actively used keys from a relatively fast cac he memory for fast processing of wireless communications. Additional keys are stored in relatively slow system memory that has high storage capacity. As keys become needed for active use, the keys are retrieve from the system memory and stored in the cache memory. By using active memory for keys actively being used, system performance is enhanced. By using system memory for keys not being used, a greater number of keys are available for transfer to the cache and subsequent active use.

    KEY CACHING SYSTEM
    5.
    发明申请
    KEY CACHING SYSTEM 审中-公开
    关键缓存系统

    公开(公告)号：WO0223867A3

    公开(公告)日：2003-01-16

    申请号：PCT/US0128696

    申请日：2001-09-14

    Applicant: ATHEROS COMM INC

    Inventor： KUSKIN JEFFREY SCOTT ,  NG TAO-FEI SAMUEL ,  DHAMDHERE DEEPAK PRABHAKAR ,  CAIN FIONA J ,  DAVIDSON ANDREW M

    IPC: H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/12

    CPC classification number: H04L63/0428 ,  H04L1/1829 ,  H04L29/06 ,  H04L29/12783 ,  H04L61/35 ,  H04L63/062 ,  H04L63/164 ,  H04L69/12 ,  H04W8/26 ,  H04W12/02 ,  H04W12/04 ,  H04W84/12

    Abstract: A key-caching system retrieves actively used keys from a relatively fast cache memory for fast processing of wireless communications. Additional keys are stored in relatively slow system memory that has high storage capacity. As keys become needed for active use, the keys are retrieve from the system memory and stored in the cache memory. By using active memory for keys actively being used, system performance is enhanced. By using system memory for keys not being used, a greater number of keys are available for transfer to the cache and subsequent active use.

    Abstract translation: 密钥缓存系统从相对较快的高速缓冲存储器中检索主动使用的密钥，用于无线通信的快速处理。 附加键存储在具有高存储容量的相对较慢的系统存储器中。 随着密钥变得需要主动使用，密钥从系统存储器中检索并存储在高速缓冲存储器中。 通过使用主动使用的主动内存，可以提高系统性能。 通过对未使用的密钥使用系统内存，可以使用更多数量的密钥来传输到缓存和随后的主动使用。

    METHOD AND SYSTEM FOR TRANSMIT DATA BLOCKING IN A WIRELESS COMMUNICATIONS NETWORK
    6.
    发明申请
    METHOD AND SYSTEM FOR TRANSMIT DATA BLOCKING IN A WIRELESS COMMUNICATIONS NETWORK 审中-公开
    用于无线通信网络中发送数据阻塞的方法和系统

    公开(公告)号：WO0223810A3

    公开(公告)日：2003-02-27

    申请号：PCT/US0128745

    申请日：2001-09-12

    Applicant: ATHEROS COMM INC

    Inventor： DAVIDSON ANDREW M ,  NG TAO-FEI S ,  KUSKIN JEFFREY SCOTT ,  DHAMDHERE DEEPAK PRABHAKAR ,  CAIN FIONA J

    IPC: H04L12/28 ,  H04L29/08 ,  H04W24/00 ,  H04W28/10 ,  H04W72/12 ,  H04W84/18 ,  H04L12/56

    CPC classification number: H04W28/10 ,  H04W72/12

    Abstract: Systems and methods to provide ordered transmission of data packets to multiple destinations are presented. A transmission device includes a transmitter, a data packet ordering unit, a state table, and a transmit management interface such as a hardware/software unit. The state table stores a transmit block status of each destination. The transmit management interface is coupled to the transmitter and analyzes data packets. The transmit management interface determines whether to transmit a data packet targeted to a particular destination or to block transmission of data packets to the particular destination by examining the transmit block status of the particular destination from the state table.

    Abstract translation: 提供了向多个目的地提供数据分组的有序传输的系统和方法。 传输设备包括发射机，数据分组排序单元，状态表和诸如硬件/软件单元的发射管理接口。 状态表存储每个目的地的发送块状态。 发射管理接口耦合到发射机并分析数据包。 发送管理接口通过从状态表检查特定目的地的发送块状态来确定是否发送针对特定目的地的数据分组，或者阻止向特定目的地发送数据分组。

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