公开(公告)号：NO20014371A

公开(公告)日：2001-09-07

申请号：NO20014371

申请日：2001-09-07

Applicant: ATMEL CORP

Inventor： ZAVREL JR ROBERT J ,  BAUMANN DAN C

IPC: H01L23/12 ,  H01L23/538 ,  H01L23/66 ,  H01L25/00 ,  H01L25/16 ,  H01L27/06 ,  H01L27/08 ,  H05K1/16 ,  H05K3/46 ,  H01L29/00 ,  H01L23/48 ,  H01L23/52

CPC classification number: H01L23/5383 ,  H01L23/5386 ,  H01L23/66 ,  H01L25/16 ,  H01L27/0641 ,  H01L27/08 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/4611 ,  H05K3/4644 ,  H05K2201/09263 ,  H05K2201/09672 ,  H05K2201/097 ,  H05K2201/10674

公开(公告)号：NO20014371D0

公开(公告)日：2001-09-07

申请号：NO20014371

申请日：2001-09-07

Applicant: ATMEL CORP

Inventor： ZAVREL JR ROBERT J ,  BAUMANN DAN C

IPC: H01L23/538 ,  H01L23/66 ,  H01L25/00 ,  H01L23/12 ,  H01L25/16 ,  H01L27/06 ,  H01L27/08 ,  H05K1/16 ,  H05K3/46 ,  H01L29/00 ,  H01L23/48 ,  H01L23/52

Abstract: In an IC packaging scheme, a multilayer substrate is composed of electrically conductive layers of interconnects, separated by insulative layers of epoxy resin or ceramic and connected by vias. Passive elements are integrated within the substrate at the definition stage during layout of the interconnects. The passives can be used to enhance the electrical performance of the active circuit die to a maximum extent allowed by the material technology used for the substrate. Material selection for the package is made to allow for the best passive integration for a given circuit design. Typical applications include power supply bypass capacitors, radio frequency tuning, and impedance matching. The incorporation of passives in the packaging substrate creates a new class of electrically tailorable packaging that can derive improved performance for any given die design over existing approaches.

公开(公告)号：NO20014371L

公开(公告)日：2001-09-07

申请号：NO20014371

申请日：2001-09-07

Applicant: ATMEL CORP

Inventor： ZAVREL JR ROBERT J ,  BAUMANN DAN C

IPC: H01L23/538 ,  H01L23/66 ,  H01L25/00 ,  H01L23/12 ,  H01L25/16 ,  H01L27/06 ,  H01L27/08 ,  H05K1/16 ,  H05K3/46 ,  H01L29/00 ,  H01L23/48 ,  H01L23/52

Abstract: In an IC packaging scheme, a multilayer substrate is composed of electrically conductive layers of interconnects, separated by insulative layers of epoxy resin or ceramic and connected by vias. Passive elements are integrated within the substrate at the definition stage during layout of the interconnects. The passives can be used to enhance the electrical performance of the active circuit die to a maximum extent allowed by the material technology used for the substrate. Material selection for the package is made to allow for the best passive integration for a given circuit design. Typical applications include power supply bypass capacitors, radio frequency tuning, and impedance matching. The incorporation of passives in the packaging substrate creates a new class of electrically tailorable packaging that can derive improved performance for any given die design over existing approaches.