公开(公告)号：WO1998028774A1

公开(公告)日：1998-07-02

申请号：PCT/US1997022523

申请日：1997-12-18

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  FAHLEN, Theodore, S. ,  CONTE, Alfred, S. ,  DUBOC, Robert, M., Jr. ,  HOPPLE, George, B. ,  O'REILLY, John, K. ,  CHAKAROV, Vasil, M. ,  MARION, Robert, L. ,  CHO, Steven, T. ,  NEIMEYER, Robert, G. ,  SUN, Jennifer, Y. ,  MORRIS, David, L. ,  SPINDT, Christopher, J. ,  NARAYANAN, Kollengode, S.

IPC: H01J31/00

CPC classification number: H01J9/242 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8665 ,  Y10T29/49004 ,  Y10T29/49117

Abstract: Methods and structures are provided which support spacer walls (100) in a position which facilitates installation of the spacer walls (100) between a faceplate and backplate of a flat display. In one embodiment, spacer feet (111, 112) are formed at the opposing ends of the spacer wall. Tacking electrodes can be provided on the faceplate to assert an electrostatic force on the spacer feet (111, 112), thereby holding the spacer feet in place during installation of the spacer wall. The spacer wall can be mechanically and/or thermally expanded prior to attaching both ends of the spacer wall to the faceplate. The spacer wall is then allowed to contract, thereby introducing tension into the spacer wall which tends to straighten any inherent wavines in the spacer wall. Alternatively, spacer clips can be clamped onto opposing ends of a spacer wall to support the spacer wall during installation. The spacer clips can provide electrical connections to face electrodes located on the spacer wall.

Abstract translation: 提供了方法和结构，其支撑间隔壁（100）位于便于将间隔壁（100）安装在平面显示器的面板和背板之间的位置。 在一个实施例中，间隔脚（111,112）形成在间隔壁的相对端。 可以在面板上设置粘贴电极以在间隔脚（111,112）上施加静电力，从而在间隔壁的安装期间将间隔脚保持在适当的位置。 在将间隔壁的两端附接到面板之前，间隔壁可以机械地和/或热膨胀。 然后允许间隔壁收缩，从而将间隙壁引入张力，这倾向于拉直间隔壁中的任何固有的波纹。 或者，间隔夹可以夹持在间隔壁的相对端上，以在安装期间支撑间隔壁。 间隔夹可以提供到位于间隔壁上的面电极的电连接。

公开(公告)号：WO1998003986A1

公开(公告)日：1998-01-29

申请号：PCT/US1997011917

申请日：1997-07-17

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  SPINDT, Christopher, J. ,  MORRIS, David, L. ,  SCHMID, Anthony, P. ,  SUN, Yu, Nan

IPC: H01J01/62

CPC classification number: H01J31/123 ,  H01J29/028 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8655

Abstract: Methods and structures are provided which reduce charge build up on spacer walls in a flat panel display. In one embodiment, the order of activating the electron emitting elements is modified such that the electron emitting elements adjacent to the spacers are activated before the electron emitting elements which charge thespacers (501, 502, 503) to an undesirable level. In another embodiment, face electrodes (501a, 502a, 503a) which are located on the surface of the spacer are connected to a common bus (504), thereby distributing the charge built up on any particular spacer. The common bus (504) can further be connected to a capacitor (1010) which is located either inside or outside the active region of the flat panel display, thereby increasing the charging time constant of the spacers. The capacitor can be connected to ground or to a high voltage supply (1011). In another embodiment, the charging time constant of the spacers is increased by fabricating the spacers from a material having a high dielectric constant, such as dispersion of aluminum oxide, chromium oxide and titanium oxide, wherein the titanium oxide makes up approximately four percent of the spacer material.

Abstract translation: 提供了在平板显示器中减少间隔壁上积聚电荷的方法和结构。 在一个实施例中，激活电子发射元件的顺序被修改为使得邻近间隔物的电子发射元件在将电极（501,502,503）充电到不期望的电平之前被激活。 在另一个实施例中，位于间隔件表面上的面电极（501a，502a，503a）连接到公共总线（504），从而分配积累在任何特定间隔物上的电荷。 公共总线（504）还可以连接到位于平板显示器的有源区域的内部或外部的电容器（1010），从而增加间隔件的充电时间常数。 电容器可以连接到地或高压电源（1011）。 在另一个实施例中，通过从具有高介电常数的材料（例如氧化铝，氧化铬和氧化钛的分散体）制造间隔物来增加间隔物的充电时间常数，其中氧化钛占大约4％ 间隔材料。

公开(公告)号：EP1023635A1

公开(公告)日：2000-08-02

申请号：EP98936011.0

申请日：1998-07-24

Applicant: Candescent Technologies Corporation

Inventor： CHANG, David, C. ,  LEARN, Arthur, J. ,  MACKEY, Bob, L. ,  DRUMM, Paul, M. ,  MORRIS, David, L.

IPC: G03C5/00 ,  H01J9/00

CPC classification number: G03F7/0035 ,  G03F7/0007 ,  H01J9/185 ,  H01J9/242 ,  H01J2329/863

Abstract: A method for forming a three-dimensional multi-level conductive matrix structure for a flat panel display device. In one embodiment, the present invention forms first pixel separating structures across a surface of a faceplate of a flat panel display. The first pixel separating structures separate adjacent first sub-pixel regions. In this embodiment, the first pixel separating structures are formed by applying a first layer of photo-imagable material across the surface of the faceplate. Next, portions of the first layer of photo-imagable material are removed to leave regions of the first layer of photo-imagable material covering respective first sub-pixel regions. Then, a first layer of conductive material is applied over the surface of the faceplate such that the first layer conductive material is disposed between the aforementioned regions of the first layer of photo-imagable material. The present invention then removes the regions of the first layer of photo-imagable material leaving only first pixel separating structures formed of the first layer of conductive material, disposed between the first sub-pixel regions. The present invention performs similar steps in order to form second pixel separating structures between the second sub-pixel regions. The second pixel separating structures are formed substantially orthogonally oriented with respect to the first pixel separating structures and, in the present embodiment, have a different height than the first pixel separating structures. In so doing, a three-dimensional multi-level conductive matrix structure is formed.

公开(公告)号：EP1116202B1

公开(公告)日：2007-02-28

申请号：EP99943611.6

申请日：1999-07-08

Applicant: Candescent Technologies Corporation

Inventor： ELLOWAY, Donald, J. ,  MORRIS, David, L. ,  SCANNELL, William, J. ,  SPINDT, Christopher, J.

IPC: G09G3/10 ,  H01J9/44

CPC classification number: G09G3/22 ,  G09G2310/06 ,  G09G2310/066 ,  G09G2330/02 ,  H01J9/39 ,  H01J9/44 ,  H01J31/127 ,  H01J2209/0223

Abstract: A method of removing contaminant particles in newly fabricated filed emission displays. Contaminant particles are removed by a conditioning process which includes the steps of: a) driving an anode (20) of a field emission display (FED) to a predetermined voltage; b) slowly increasing an emission current of the FED after the anode has reached the predetermined voltage; and c) providing an ion-trapping device for catching the ions and particles knocked off, or otherwise released, by emitted electrons (40). By driving the anode to the predetermined voltage and by slowly increasing the emission current of the FED, contaminant particles are effectively removed without damaging the FED. A method of operating FEDs is also provided to prevent gate-to-emitter current during turn-on and turn-off, which comprises the steps of: a) enabling the anode display screen (20); and b) enabling the electron-emitters (40) after the anode display screen is enabled. By allowing sufficient time for the anode display screen to reach a predetermined voltage before the emitter is enabled, the emitted electrons (40) will be attracted to the anode (20).

Abstract translation: 在新制造的场发射显示器中去除污染物颗粒的方法。 通过调节过程去除污染物颗粒，该调节过程包括以下步骤：a）将场发射显示器（FED）的阳极（20）驱动到预定电压; b）在阳极达到预定电压后，缓慢增加FED的发射电流; 和c）提供用于捕获被发射的电子撞击或以其他方式释放的离子和粒子的离子俘获装置（40）。 通过将阳极驱动至预定电压，并通过缓慢增加FED的发射电流，污染物颗粒被有效地去除而不损坏FED。 还提供了一种操作FED的方法，以在开启和关断期间防止栅极 - 发射极电流，该方法包括以下步骤：a）启用阳极显示屏幕（20）;以及 和b）在阳极显示屏被启用之后启用电子发射器（40）。 通过在发射器启用之前允许阳极显示屏足够的时间达到预定电压，发射的电子（40）将被吸引到阳极（20）。

公开(公告)号：EP1116202A1

公开(公告)日：2001-07-18

申请号：EP99943611.6

申请日：1999-07-08

Applicant: Candescent Technologies Corporation

Inventor： ELLOWAY, Donald, J. ,  MORRIS, David, L. ,  SCANNELL, William, J. ,  SPINDT, Christopher, J.

IPC: G09G3/10

CPC classification number: G09G3/22 ,  G09G2310/06 ,  G09G2310/066 ,  G09G2330/02 ,  H01J9/39 ,  H01J9/44 ,  H01J31/127 ,  H01J2209/0223

Abstract: A method of removing contaminant particles in newly fabricated filed emission displays. Contaminant particles are removed by a conditioning process which includes the steps of: a) driving an anode (20) of a field emission display (FED) to a predetermined voltage; b) slowly increasing an emission current of the FED after the anode has reached the predetermined voltage; and c) providing an ion-trapping device for catching the ions and particles knocked off, or otherwise released, by emitted electrons (40). By driving the anode to the predetermined voltage and by slowly increasing the emission current of the FED, contaminant particles are effectively removed without damaging the FED. A method of operating FEDs is also provided to prevent gate-to-emitter current during turn-on and turn-off, which comprises the steps of: a) enabling the anode display screen (20); and b) enabling the electron-emitters (40) after the anode display screen is enabled. By allowing sufficient time for the anode display screen to reach a predetermined voltage before the emitter is enabled, the emitted electrons (40) will be attracted to the anode (20).

公开(公告)号：EP1101239A1

公开(公告)日：2001-05-23

申请号：EP99930812.5

申请日：1999-06-29

Applicant: Candescent Technologies Corporation

Inventor： SCHROPP, Donald, R., Jr. ,  FIELD, John, E. ,  DUNPHY, James, C. ,  PAN, Lawrence, S. ,  MORRIS, David, L. ,  BESSER, Ronald, S. ,  SPINDT, Christopher, J.

IPC: H01J19/38

CPC classification number: H01J29/028 ,  H01J29/467 ,  H01J29/481 ,  H01J31/127 ,  H01J2201/025 ,  H01J2329/8625

Abstract: The intensity at which electrons emitted by a first plate structure (10) in a slat-panel display strike a second plate structure (12) for causing it to emit light is controlled so as to reduce image degradation that could otherwise arise from undesired electron-trajectory changes caused by effects such as the presence of a spacer system (14) between the plate structures. An electron-emissive region (20) in the first plate structure typically contains multiple laterally separated electron-emissive portions (201 and 202) for selectively emitting electrons. An electron-focusing system in the first plate structure has corresponding focus openings (40p1 and 40p2) through which electrons emitted by the electron-emissive portions respectively pass. Upon being struck by the so-emitted electrons, a light-emissive region (22) in the second plate structure emits light to produce at least part of a dot of the display's image.

公开(公告)号：EP1082745A1

公开(公告)日：2001-03-14

申请号：EP99924248.0

申请日：1999-05-14

Applicant: Candescent Technologies Corporation

Inventor： CHANG, David, C. ,  LEARN, Arthur, J. ,  MACKEY, Bob, L. ,  DRUMM, Paul, M. ,  MORRIS, David, L.

IPC: H01J31/12

CPC classification number: H01J9/148 ,  H01J9/025 ,  H01J29/467 ,  H01J2329/00

Abstract: A field emission display includes a substrate (100), field emitter structures (106) disposed within a dielectric layer (102), a gate electrode layer (104), an insulating material layer (110), and a conductive material layer (116) forming a conductive focusing waffle structure of the present invention.

公开(公告)号：EP0948802A1

公开(公告)日：1999-10-13

申请号：EP97953116.0

申请日：1997-12-18

Applicant: Candescent Technologies Corporation

Inventor： FAHLEN, Theodore, S. ,  CONTE, Alfred, S. ,  DUBOC, Robert, M., Jr. ,  HOPPLE, George, B. ,  O'REILLY, John, K. ,  CHAKAROV, Vasil, M. ,  MARION, Robert, L. ,  CHO, Steven, T. ,  NEIMEYER, Robert, G. ,  SUN, Jennifer, Y. ,  MORRIS, David, L. ,  SPINDT, Christopher, J. ,  NARAYANAN, Kollengode, S.

IPC: H01J9 ,  H01J29 ,  H01J31

CPC classification number: H01J9/242 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8665 ,  Y10T29/49004 ,  Y10T29/49117

Abstract: Methods and structures are provided which support spacer walls (100) in a position which facilitates installation of the spacer walls (100) between a faceplate and backplate of a flat display. In one embodiment, spacer feet (111, 112) are formed at the opposing ends of the spacer wall. Tacking electrodes can be provided on the faceplate to assert an electrostatic force on the spacer feet (111, 112), thereby holding the spacer feet in place during installation of the spacer wall. The spacer wall can be mechanically and/or thermally expanded prior to attaching both ends of the spacer wall to the faceplate. The spacer wall is then allowed to contract, thereby introducing tension into the spacer wall which tends to straighten any inherent wavines in the spacer wall. Alternatively, spacer clips can be clamped onto opposing ends of a spacer wall to support the spacer wall during installation. The spacer clips can provide electrical connections to face electrodes located on the spacer wall.

公开(公告)号：EP0968510A1

公开(公告)日：2000-01-05

申请号：EP97933337.4

申请日：1997-07-17

Applicant: Candescent Technologies Corporation

Inventor： SPINDT, Christopher, J. ,  MORRIS, David, L. ,  SCHMID, Anthony, P. ,  SUN, Yu, Nan

IPC: H01J1/62 ,  H01J63/04

CPC classification number: H01J31/123 ,  H01J29/028 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8655

Abstract: Methods and structures are provided which reduce charge build up on spacer walls in a flat panel display. In one embodiment, the order of activating the electron emitting elements is modified such that the electron emitting elements adjacent to the spacers are activated before the electron emitting elements which charge thespacers (501, 502, 503) to an undesirable level. In another embodiment, face electrodes (501a, 502a, 503a) which are located on the surface of the spacer are connected to a common bus (504), thereby distributing the charge built up on any particular spacer. The common bus (504) can further be connected to a capacitor (1010) which is located either inside or outside the active region of the flat panel display, thereby increasing the charging time constant of the spacers. The capacitor can be connected to ground or to a high voltage supply (1011). In another embodiment, the charging time constant of the spacers is increased by fabricating the spacers from a material having a high dielectric constant, such as dispersion of aluminum oxide, chromium oxide and titanium oxide, wherein the titanium oxide makes up approximately four percent of the spacer material.

公开(公告)号：EP0818051A1

公开(公告)日：1998-01-14

申请号：EP96910462.0

申请日：1996-03-29

Applicant: Candescent Technologies Corporation

Inventor： SCHMID, Anthony, P. ,  SPINDT, Christopher, J. ,  MORRIS, David, L. ,  FAHLEN, Theodore, S. ,  SUN, Yu, Nan

IPC: H01J9 ,  C04B35 ,  H01J5 ,  H01J11 ,  H01J17 ,  H01J19 ,  H01J29 ,  H01J31 ,  H01J61

CPC classification number: H01J29/085 ,  H01J9/185 ,  H01J9/242 ,  H01J29/028 ,  H01J29/467 ,  H01J29/864 ,  H01J31/123 ,  H01J31/127 ,  H01J61/30 ,  H01J2329/8625 ,  H01J2329/863 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8655 ,  Y10T156/1052 ,  Y10T156/1077 ,  Y10T156/1082 ,  Y10T156/1093

Abstract: The invention provides spacers for separating and supporting a faceplate structure and a backplate structure in a flat panel display, and methods for fabricating these spacers. Each spacer is typically made of ceramic, such as alumina, containing transition metal oxide, such as titania, chromia or iron oxide. Each spacer can be fabricated with an electrically insulating core and electrically resistive skins. The insulating core can be a wafer formed of ceramic such as alumina, and the resistive skins can be formed by laminating electrically resistive wafers, formed from alumina containing transition metal oxide, to the outside surfaces of the insulating core. Each spacer can also have a core of electrically insulating ceramic composition made of a ceramic containing a transition metal oxide in its higher oxide states, and electrically resistive outside surfaces made of a ceramic containing a transition metal oxide in lower oxide states. Face and/or edge metallization strips can optionally be provided on each spacer.