公开(公告)号：WO2003091976A1

公开(公告)日：2003-11-06

申请号：PCT/US2003/011841

申请日：2003-04-18

Applicant: CANDESCENT TECHNOLOGIES CORPORATION ,  SONY CORPORATION

Inventor： HANSEN, Ronald, L. ,  DUNPHY, James, C. ,  SPINDT, Christopher, J. ,  CLEEVES, James, M. ,  TRUPPA, Jerome, M. ,  FINK, Gregory, M. ,  IGUCHI, Yukinobu

IPC: G09G3/22

CPC classification number: G09G3/22 ,  G09G3/2011 ,  G09G3/2014 ,  G09G5/02 ,  G09G2310/06 ,  G09G2320/0285 ,  G09G2320/029 ,  Y10S345/904

Abstract: A field emission display (110) having a correction system (105) with a correction coefficient derived from emission current is presented. Within one embodiment, a field emission display (110) with an anode (25) at the faceplate and a focus structure (90). The anode potential is held at ground while the focus structure (90) potential is held between, but is not limited to, 40 and 50 volts. The current flowing to the focus structure (90) is measured and used as the basis for the correction coefficient for the field emission display (110).

Abstract translation: 具有具有从发射电流导出的校正系数的校正系统（105）的场致发射显示器（110）。 在一个实施例中，在面板上具有阳极（25）的场发射显示器（110）和聚焦结构（90）。 阳极电位保持在地面，同时聚焦结构（90）电位保持在但不限于40和50伏之间。 流过聚焦结构（90）的电流被测量并用作场致发射显示器（110）的校正系数的基础。

公开(公告)号：WO1997019460A1

公开(公告)日：1997-05-29

申请号：PCT/US1996018773

申请日：1996-11-20

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  SPINDT, Christopher, J. ,  FIELD, John, E. ,  HAVEN, Duane, A.

IPC: H01J31/12

CPC classification number: H01J29/327 ,  H01J9/242 ,  H01J29/085 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/8625 ,  H01J2329/863 ,  H01J2329/8665

Abstract: A flat panel display is disclosed which includes a faceplate with a faceplate interior side, and a backplate including a backplate interior side in an opposing relationship to the faceplate interior side. Side walls are positioned between the faceplate and the backplate. The side walls, faceplate and backplate form an enclosed sealed envelope. A plurality of phosphor subpixels are positioned at the faceplate interior side. A plurality of field emitters are positioned at the backplate interior side. The field emitters emit electrons which strike corresponding phosphor subpixels. A plurality of scattering shields surround each phosphor subpixel and define a subpixel volume. The scattering shields reduce the number of scattered electrons exiting from their corresponding subpixel volume. This reduces the number of scattered electrons from charging internal insulating surfaces in the envelope, as well as striking the non-corresponding phosphor subpixels.

Abstract translation: 公开了一种平板显示器，其包括具有面板内侧的面板和包括与面板内侧相对的背板内侧的背板。 侧壁位于面板和背板之间。 侧壁，面板和背板形成封闭的密封信封。 多个荧光体子像素位于面板内侧。 多个场发射器位于背板内侧。 场发射体发射撞击相应荧光体子像素的电子。 多个散射屏蔽围绕每个荧光体子像素并且限定子像素体积。 散射屏蔽减少从其相应的子像素体积排出的散射电子的数量。 这样就减少了从外壳中的内部绝缘表面充电所产生的散射电子数量，并且使非对应的荧光体子像素撞击。

公开(公告)号：WO1998028774A1

公开(公告)日：1998-07-02

申请号：PCT/US1997022523

申请日：1997-12-18

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  FAHLEN, Theodore, S. ,  CONTE, Alfred, S. ,  DUBOC, Robert, M., Jr. ,  HOPPLE, George, B. ,  O'REILLY, John, K. ,  CHAKAROV, Vasil, M. ,  MARION, Robert, L. ,  CHO, Steven, T. ,  NEIMEYER, Robert, G. ,  SUN, Jennifer, Y. ,  MORRIS, David, L. ,  SPINDT, Christopher, J. ,  NARAYANAN, Kollengode, S.

IPC: H01J31/00

CPC classification number: H01J9/242 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8665 ,  Y10T29/49004 ,  Y10T29/49117

Abstract: Methods and structures are provided which support spacer walls (100) in a position which facilitates installation of the spacer walls (100) between a faceplate and backplate of a flat display. In one embodiment, spacer feet (111, 112) are formed at the opposing ends of the spacer wall. Tacking electrodes can be provided on the faceplate to assert an electrostatic force on the spacer feet (111, 112), thereby holding the spacer feet in place during installation of the spacer wall. The spacer wall can be mechanically and/or thermally expanded prior to attaching both ends of the spacer wall to the faceplate. The spacer wall is then allowed to contract, thereby introducing tension into the spacer wall which tends to straighten any inherent wavines in the spacer wall. Alternatively, spacer clips can be clamped onto opposing ends of a spacer wall to support the spacer wall during installation. The spacer clips can provide electrical connections to face electrodes located on the spacer wall.

Abstract translation: 提供了方法和结构，其支撑间隔壁（100）位于便于将间隔壁（100）安装在平面显示器的面板和背板之间的位置。 在一个实施例中，间隔脚（111,112）形成在间隔壁的相对端。 可以在面板上设置粘贴电极以在间隔脚（111,112）上施加静电力，从而在间隔壁的安装期间将间隔脚保持在适当的位置。 在将间隔壁的两端附接到面板之前，间隔壁可以机械地和/或热膨胀。 然后允许间隔壁收缩，从而将间隙壁引入张力，这倾向于拉直间隔壁中的任何固有的波纹。 或者，间隔夹可以夹持在间隔壁的相对端上，以在安装期间支撑间隔壁。 间隔夹可以提供到位于间隔壁上的面电极的电连接。

公开(公告)号：WO2003002957A2

公开(公告)日：2003-01-09

申请号：PCT/US2002/020243

申请日：2002-06-24

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CUMMINGS, William ,  DUNPHY, James, C. ,  HANSEN, Ronald, L. ,  LIU, Jun ,  CRESSI, Lee ,  STANNERS, Colin ,  SPINDT, Christopher, J.

IPC: G01J

CPC classification number: G09G3/22 ,  G09G2320/0233 ,  G09G2320/0285

Abstract: Methods for compensating for brightness variations in a field emission device. In one embodiment, a method and system are described for measuring therelative brightness of rows of a field emission display (FED) device, storinginformation representing the measured brightness into a correction table and using the correction table to provide uniform row brightness in the display by adjustingrow voltages and/or row on-time periods. A special measurement process is described for providing accurate current measurements on the rows. This embodiment compensates for brightness variations of the rows, e.g., for rows nearthe spacer walls. In another embodiment, a periodic signal, e.g., a high frequencynoise signal, is added to the row on-time pulse in order to camouflage brightnessvariations in the rows near the spacer walls. In another embodiment, the areaunder the row on-time pulse is adjusted to provide row-by-row brightnesscompensation based on correction values stored in a memory resident correctiontable. In another embodiment, the brightness of each row is measured and compiled into a data profile for the FED. The data profile is used to control cathodeburn-in processes so that brightness variations are corrected by physically altering the characteristics of the emitters of the rows.

Abstract translation: 用于补偿场致发射装置（100a）中的亮度变化的方法。 在一个实施例中，描述了用于测量场发射显示（FED）装置（100a）的行的相对亮度的方法和系统，其将表示测量的亮度的信息存储到校正表中，并且使用校正表来提供均匀的行亮度 通过调节行电压和/或行导通时间周期来显示。 描述了一种特殊的测量过程，用于在行上提供精确的电流测量。 该实施例补偿行的亮度变化，例如用于靠近隔离壁（30）的行。 在另一个实施例中，周期性信号，例如高频噪声信号（340）被添加到行准时脉冲，以伪装靠近隔离壁（30）的行中的亮度变化。 在另一个实施例中，调整行导通时间脉冲之下的区域，以基于存储在存储器驻留校正表（60）中的校正值提供逐行亮度补偿。 在另一个实施例中，测量每行的亮度并将其编译成用于FED的数据简档。 数据轮廓用于控制阴极老化过程，从而通过物理地改变行的发射器的特性来校正亮度变化。

公开(公告)号：WO1998002899A1

公开(公告)日：1998-01-22

申请号：PCT/US1997011730

申请日：1997-07-16

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  SPINDT, Christopher, J. ,  FIELD, John, E.

IPC: H01J19/42

CPC classification number: H01J29/028 ,  H01J9/185 ,  H01J31/127 ,  H01J2201/025 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8655

Abstract: A flat panel display (300) having a faceplate structure (320), a backplate structure (330), a focusing structure (333a), and a plurality of spacers (340). The backplate structure includes an electron emitting structure (332) which faces the faceplate structure. The focusing structure has a first surface which is located on the electron emitting structure, and a second surface which extends away from the electron emitting structure. The electrical end of the combination of the focusing structure and the electron emitting structure is located at an imaginary plane located intermediate the first and second surfaces of the focusing structure. The spacers are located between the focusing structure and the light emitting structure. Each spacer is located within a corresponding groove in the focusing structure such that the electrical end of each spacer is located coincident with the electrical end of the combination of the focusing structure and the electron emitting structure.

Abstract translation: 具有面板结构（320），背板结构（330），聚焦结构（333a）和多个间隔物（340）的平板显示器（300）。 背板结构包括面向面板结构的电子发射结构（332）。 聚焦结构具有位于电子发射结构上的第一表面和远离电子发射结构延伸的第二表面。 聚焦结构和电子发射结构的组合的电端位于位于聚焦结构的第一和第二表面之间的假想平面处。 间隔物位于聚焦结构和发光结构之间。 每个间隔物位于聚焦结构中的相应凹槽内，使得每个间隔物的电端与聚焦结构和电子发射结构的组合的电端重合。

公开(公告)号：WO1997047020A1

公开(公告)日：1997-12-11

申请号：PCT/US1997009196

申请日：1997-06-05

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  HAVEN, Duane, A. ,  LUDWIG, Paul, N. ,  SPINDT, Christopher, J. ,  DOBKIN, Daniel, M.

IPC: H01J01/30

CPC classification number: H01J9/025 ,  H01J2329/00

Abstract: A gated electron-emitter is fabricated by a process in which particles (26) are deposited over an insulating layer (24). Gate material is provided over the insulating layer in the space between the particles after which the particles and any overlying material are removed. The remaining gate material forms a gate layer (28A or 48A) through which gate openings (30 or 50) extend at the locations of the removed particles. When the gate material deposition is performed so that part of the gate material extends into the spaces below the particles, the gate openings are beveled. The insulating layer is etched through the gate openings to form dielectric openings (32 or 52). Electron-emissive elements (36A or 56A) are formed in the dielectric openings. This typically involves introducing emitter material through the gate openings into the dielectric openings and using a lift-off layer (34), or an electrochemical technique, to remove excess emitter material.

Abstract translation: 门控电子发射器通过其中颗粒（26）沉积在绝缘层（24）上的方法制造。 在颗粒之间的空间中的绝缘层上提供栅极材料，之后除去颗粒和任何上覆材料。 剩余的栅极材料形成栅极层（28A或48A），栅极开口（30或50）在去除的颗粒的位置处延伸通过栅极层（28A或48A）。 当进行栅极材料沉积使得栅极材料的一部分延伸到颗粒下方的空间中时，栅极开口被倒角。 通过栅极开口蚀刻绝缘层以形成电介质开口（32或52）。 在电介质开口中形成电子发射元件（36A或56A）。 这通常包括将发射体材料通过栅极开口引入电介质开口并使用剥离层（34）或电化学技术来去除多余的发射体材料。

公开(公告)号：WO1998019501A1

公开(公告)日：1998-05-07

申请号：PCT/US1997017549

申请日：1997-10-17

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  HANSEN, Ronald, L. ,  SPINDT, Christopher, J. ,  FIELD, John, E.

IPC: H05B37/00

CPC classification number: G09G3/22 ,  G09G2310/027 ,  G09G2320/0276 ,  H01J2329/00

Abstract: A voltage-adjustment section (20) of an electronic device converts an input control voltage (VI) into an output control voltage (VO) in such a way that a collector current (ICP) form with electrons emitted from an emitter (EP) of an emission/collection cell (26), or triode, varies in a desired, typically linear, manner with the input control voltage. The triode further includes a collector (CP) that carries the collector current and a gate electrode (GP) that regulates the collector current as a function of the output control voltage. Control of the collector current so as to achieve the desired current/voltage relationship is achieved with an analog control loop containing the triode and an amplifier (28) coupled between the triode's collector and gate electrode. The triode thus typically has a linear gamma characteristic relative to the input control voltage. The voltage-adjustment section is suitable for use in a display device such as a flat-panel display.

Abstract translation: 电子设备的电压调节部分（20）将输入控制电压（VI）转换为输出控制电压（VO），使得集电极电流（ICP）形式与从发射器（EP）发射的电子 发射/收集单元（26）或三极管以期望的，典型地线性的方式与输入控制电压变化。 三极管还包括承载集电极电流的集电极（CP）和调节作为输出控制电压的函数的集电极电流的栅电极（GP）。 利用包含三极管的模拟控制回路和耦合在三极管的集电极和栅电极之间的放大器（28）来实现集电极电流的控制以达到期望的电流/电压关系。 因此，三极管相对于输入控制电压通常具有线性γ特性。 电压调节部适用于平板显示器等显示装置。

公开(公告)号：WO1997047021A1

公开(公告)日：1997-12-11

申请号：PCT/US1997009198

申请日：1997-06-05

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  LUDWIG, Paul, N. ,  HAVEN, Duane, A. ,  MACAULAY, John, M. ,  SPINDT, Christopher, J. ,  CLEEVES, James, M. ,  KNALL, N., Johan

IPC: H01J09/02

CPC classification number: H01J9/025 ,  H01J2329/00

Abstract: An electron-emitter having a lower non-insulating emitter region (42), an overlying insulating layer (44), and a gate layer (48A, 60A, 60B, 120A, or 180A/184) is fabricated by a process in which particles (46) are distributed over one of the following layers: the insulating layer, the gate layer, a primary layer (50A, 62A, or 72) provided over the gate layer, a further layer (74) provided over the primary layer, or a pattern-transfer layer (182). The particles are utilized in defining gate openings (54, 66, 80, 122, or 186/188) through the gate layer. The gate openings are then variously employed in forming dielectric openings (56, 58, 80, 114, 128, 144, or 154) through the insulating layer. Electron-emissive elements that can, for example, be shaped like cones (58A or 70A) or like filaments (106B, 116B, 130A, 146A, or 156B) are formed in the dielectric openings.

Abstract translation: 具有下部非绝缘发射极区域（42），上覆绝缘层（44）和栅极层（48A，60A，60B，120A或180A / 184）的电子发射体通过其中颗粒 （46）分布在以下层之一上：绝缘层，栅极层，设置在栅极层上的初级层（50A，62A或72），设置在主层上的另一层（74），或 图案转印层（182）。 这些颗粒用于通过栅极层限定栅极开口（54,66,80,122或186/188）。 然后，通过绝缘层形成电介质开口（56,58,80,114,128,144或154），各种门开口被不同地使用。 在电介质开口中形成电子发射元件，其可以例如成形为锥体（58A或70A）或类似的细丝（106B，116B，130A，146A或156B）。

公开(公告)号：WO1997033297A1

公开(公告)日：1997-09-12

申请号：PCT/US1997002973

申请日：1997-03-05

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  SPINDT, Christopher, J. ,  CHAKAROVA, Gabriela, S. ,  NIKOLOVA, Maria, S. ,  SEARSON, Peter, C. ,  HAVEN, Duane, A. ,  KNALL, Nils, Johan ,  MACAULAY, John, C. ,  BARTON, Roger, W.

IPC: H01J09/02

CPC classification number: H01J9/025

Abstract: An electrochemical technique is employed for removing certain material from a partially finished structure without significantly chemically attacking certain other material of the same chemical type as the removed material. The partially finished structure contains a first electrically non-insulating layer (52C) consisting at least partially of first material, typically excess emitter material that accumulates during the deposition of the emitter material to form electron-emissive elements (52A) in an electron emitter, that overlies an electrically insulating layer (44). An electrically non-insulating member, such as an electron-emissive element, consisting at least partially of the first material is situated at least partly in an opening (50) extending through the insulating layer. With the partially finished structure so arranged, at least part of the first material of the first non-insulating layer is electrochemically removed such that the non-insulating member is exposed without significantly attacking the first material of the non-insulating member.

Abstract translation: 采用电化学技术从部分完成的结构中去除某些材料，而不会显着地化学侵蚀与去除的材料相同的化学类型的某些其他材料。 部分完成的结构包含至少部分由第一材料构成的第一非绝缘层（52C），通常是在发射体材料沉积期间积累以形成电子发射器中的电子发射元件（52A）的过量发射极材料， 其覆盖电绝缘层（44）。 至少部分由第一材料组成的电绝缘构件，例如电子发射元件至少部分地位于延伸穿过绝缘层的开口（50）中。 在部分完成的结构如此布置的情况下，第一非绝缘层的第一材料的至少一部分被电化学去除，使得非绝缘构件暴露而不显着地侵害非绝缘构件的第一材料。

公开(公告)号：WO1998003986A1

公开(公告)日：1998-01-29

申请号：PCT/US1997011917

申请日：1997-07-17

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  SPINDT, Christopher, J. ,  MORRIS, David, L. ,  SCHMID, Anthony, P. ,  SUN, Yu, Nan

IPC: H01J01/62

CPC classification number: H01J31/123 ,  H01J29/028 ,  H01J2329/8625 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8655

Abstract: Methods and structures are provided which reduce charge build up on spacer walls in a flat panel display. In one embodiment, the order of activating the electron emitting elements is modified such that the electron emitting elements adjacent to the spacers are activated before the electron emitting elements which charge thespacers (501, 502, 503) to an undesirable level. In another embodiment, face electrodes (501a, 502a, 503a) which are located on the surface of the spacer are connected to a common bus (504), thereby distributing the charge built up on any particular spacer. The common bus (504) can further be connected to a capacitor (1010) which is located either inside or outside the active region of the flat panel display, thereby increasing the charging time constant of the spacers. The capacitor can be connected to ground or to a high voltage supply (1011). In another embodiment, the charging time constant of the spacers is increased by fabricating the spacers from a material having a high dielectric constant, such as dispersion of aluminum oxide, chromium oxide and titanium oxide, wherein the titanium oxide makes up approximately four percent of the spacer material.

Abstract translation: 提供了在平板显示器中减少间隔壁上积聚电荷的方法和结构。 在一个实施例中，激活电子发射元件的顺序被修改为使得邻近间隔物的电子发射元件在将电极（501,502,503）充电到不期望的电平之前被激活。 在另一个实施例中，位于间隔件表面上的面电极（501a，502a，503a）连接到公共总线（504），从而分配积累在任何特定间隔物上的电荷。 公共总线（504）还可以连接到位于平板显示器的有源区域的内部或外部的电容器（1010），从而增加间隔件的充电时间常数。 电容器可以连接到地或高压电源（1011）。 在另一个实施例中，通过从具有高介电常数的材料（例如氧化铝，氧化铬和氧化钛的分散体）制造间隔物来增加间隔物的充电时间常数，其中氧化钛占大约4％ 间隔材料。