公开(公告)号：JP2011187969A

公开(公告)日：2011-09-22

申请号：JP2011092610

申请日：2011-04-19

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： KONO ICHIRO ,  OKADA OSAMU

IPC: H01L23/12 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To prevent the adverse effect of alteration occurrence in a protective-film upper-surface-layer during a manufacture of a semiconductor device including a silicon substrate on which the protective-film made of a polyimide or the like is formed. SOLUTION: When an opening 6 is formed through the protective-film 5 made of a polyimide or the like, residues consisting of the polyimide or the like sometimes remain on a top surface exposed through the opening 6 of the protective-film 5, of a connection pad 2. Therefore, the residues are removed by oxygen plasma ashing next. This causes formation of the alteration layer A of an irregular structure on the upper-surface side of the protective-film 5. Next, a natural oxide film formed on the top surface of the connection pad 2 exposed through an opening 4 and the opening 6, of the connection pad 2, is removed by argon plasma etching. This causes further alteration of the alteration layer A, hence formation of an alteration layer C of a network structure. Next, the first base metal layer 7 made of titanium or the like is deposited on the alteration layer C. In this case, since the first base metal layer 7 is deposited on an upper surface of the alteration layer C of the network structure, the adhesion strength at an interface between the layers 7 and C is high. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题为了防止在制造包括由其制成由聚酰亚胺等制成的保护膜的硅基板的半导体器件的保护膜上表面层中发生变化的不利影响 形成了。 解决方案：当通过由聚酰亚胺等制成的保护膜5形成开口6时，由聚酰亚胺等构成的残留物有时保留在通过保护膜5的开口6露出的顶表面上 ，因此，接下来的氧等离子体灰化除去残留物。 这导致在保护膜5的上表面侧形成不规则结构的改变层A.接下来，形成在通过开口4暴露的连接焊盘2的顶表面上的自然氧化膜和开口6 通过氩等离子体蚀刻去除连接焊盘2。 这导致改变层A的进一步改变，从而形成网络结构的改变层C. 接下来，将由钛等制成的第一基底金属层7沉积在改质层C上。在这种情况下，由于第一基底金属层7沉积在网状结构的改质层C的上表面上， 层7和C之间的界面处的粘附强度高。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2011165797A

公开(公告)日：2011-08-25

申请号：JP2010025332

申请日：2010-02-08

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： KONO ICHIRO

IPC: H01L23/12 ,  H01L21/3205 ,  H01L23/52

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To provide a forming method of a conductor layer capable of surely removing a resist residue.
SOLUTION: The forming method of a conductor layer includes a resist peeling step in which a conductor layer 19 is patterned using a resist 20 on a part of a substrate 10, and then the resist 20 is peeled, and a resist residue removing step in which a solvent is jetted from a first nozzle 103 at first jetting pressure against the surface of substrate 10 where the conductor layer 19 is formed so that a residue 20b of the resist 20 becomes sodden, and a solvent is jetted from a second nozzle 104 at second jetting pressure higher than the first jetting pressure so that the residue 20b of the resist 20 is removed by a physical force.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供能够确保去除抗蚀剂残留物的导体层的形成方法。 解决方案：导体层的形成方法包括抗蚀剂剥离步骤，其中使用抗蚀剂20在基板10的一部分上对导体层19进行图案化，然后剥离抗蚀剂20，并且除去抗蚀剂残留物 在第一喷射压力下将溶剂从第一喷嘴103喷射到基板10的形成导体层19的表面的步骤，使得抗蚀剂20的残余物20b变得沉淀，并且溶剂从第二喷嘴 104的第二喷射压力高于第一喷射压力，使得抗蚀剂20的残余物20b被物理力除去。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2002001967A

公开(公告)日：2002-01-08

申请号：JP2000190407

申请日：2000-06-26

Applicant: CASIO COMPUTER CO LTD

Inventor： KONO ICHIRO

IPC: B41J2/21 ,  B41J2/135

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing ink jet print head by which jet nozzles and channels to prevent mixing of colored ink can be made easier are more accurately. SOLUTION: First, in the processes 1 to 4, drive circuits 26, heating parts 31, individual wiring electrodes 32, common wiring electrodes 33 and partitions 34 are formed on the substrate 25, and ink supply channel 27 and ink feed holes 28 are also formed on the substrate 25. Then, in the processes 5 to 6, a first orifice plate 35 is stuck on the partitions 34, and a first mask film 37 for etching is formed on the orifice plate 35, and jet nozzles 38 are made in the orifice plate 35 by etching. In addition, a second orifice plate 39 is stuck on the first orifice plate 35, and a second mask film 42 is formed on the surface of the second orifice plate 39, and channels 43 which prevent mixing of colored inks are made by etching and are made to communicate with the jet nozzles 38.

公开(公告)号：JP2001246752A

公开(公告)日：2001-09-11

申请号：JP2000057534

申请日：2000-03-02

Applicant: CASIO COMPUTER CO LTD

Inventor： KONO ICHIRO ,  KANEMITSU SATOSHI ,  KAWAMURA YOSHIHIRO

IPC: B41J2/05 ,  B41J2/16

Abstract: PROBLEM TO BE SOLVED: To provide an electric circuit substrate appropriate for an ink-jet printer head with connecting terminals which provides good electric connection. SOLUTION: A driving circuit 27, a resistance heating part 28, a common electrode 29, individual wiring electrodes 31, the connecting terminals 32, etc., are first formed on a chip substrate 21. A seal diaphragm 33-1, and partition diaphragms 33-2 and 33-3 for forming ink-pressuring chambers 34 are successively formed, and at the same time a supporting member 35 of the same material as a material of the partition diaphragm 33-2 is formed to continue with the partition diaphragm 33-2. Moreover, ink supply grooves 36 and ink feed-and- transfer holes 37 are formed. An orifice plate 22 is stacked on these. After holes 25 for bonding are etched to positions corresponding to the connecting terminals 32, the orifice plate is separated at a right end part from the adjacent chip substrate. Since the orifice plate 22 is supported by the supporting member 35, the orifice plate is prevented from hanging down and touching the connecting terminals 32. An etching rate is prevented from being decreased by thermal conduction or the like. Generation of an etching residue is prevented. The connecting terminals 32 accordingly maintain a good electric connectability.

公开(公告)号：JP2001113705A

公开(公告)日：2001-04-24

申请号：JP29745499

申请日：1999-10-19

Applicant: CASIO COMPUTER CO LTD

Inventor： KONO ICHIRO ,  NAKAMURA OSAMU

IPC: B41J2/05 ,  B41J2/135

Abstract: PROBLEM TO BE SOLVED: To provide a metallic mask optimum for dry etching, a high performance ink-jet printer head provided with the metallic mask, and a production method thereof. SOLUTION: A silicon wafer having an orifice plate laminated on the uppermost laver of a large number of head chips, is set on a stage of a film forming chamber of a sputterina device so as to execute a film forming pretreatment of heating at l00 deg.C-150 deg.C for 30 minutes or more and cooling down to 20-30 deg.C (room temperature). Then, a sputtering operation is executed on the orifice plate with Ti of a 99.999% or more purity, 4.0±1.2 Pa vacuum pressure, 70±25W main sputtering power, Ar sputtering gas conditions so as to form a Ti thin film with characteristics of a 3-4 mΩcm specific resistance and a non-hexagnal close-packed structure without an optical multiple reflection. After forming a mask pattern corresponding to an ejection nozzle on the Ti film, a perforating process is executed by a helicon wave dry etching device.

公开(公告)号：JP2001010069A

公开(公告)日：2001-01-16

申请号：JP18751799

申请日：1999-07-01

Applicant: CASIO COMPUTER CO LTD

Inventor： KONO ICHIRO

IPC: B41J2/16

Abstract: PROBLEM TO BE SOLVED: To provide a production method of an ink-jet printer head, capable of producing an appropriate product at a good yield by preventing a problem of cracking of a substrate. SOLUTION: In head chips 35 with the same configuration on a silicon wafer 52, in the exposure of a driving circuit, first, head chips 35 in odd-numbered rows 56 in the arrangement direction orthogonal to an orientation flat 55 are exposed. Next, with the reticle of the silicon wafer 52 rotated by 180 degrees, head chips 35 in even-numbered rows 57 are exposed so as to form driving circuits zigzag in the head chip longitudinal direction for each head chip 35. Thereafter, a heat generation part, a common electrode, an individual wiring electrode, a partition wall, a common ink supply groove 43, an ink receipt and supply hole 44, an ink ejection nozzle, or the like are formed by a processing step same as the conventional method, using a proximity type exposing device and a photomask with patterns arranged zigzag. Accordingly, the common ink supply grooves 43 as a narrow groove are not aligned straightly, thus the silicon wafer 52 hardly cracks in the later step.

公开(公告)号：JP2011210939A

公开(公告)日：2011-10-20

申请号：JP2010076966

申请日：2010-03-30

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： KONO ICHIRO ,  MASUDA KAZUHIRO ,  KURIHARA MITSUHIKO

IPC: H01L23/12

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To provide an inexpensive semiconductor device that prevents a migration phenomenon of metal, and to provide a method of manufacturing the semiconductor device.SOLUTION: The semiconductor device 1 includes: a plurality of re-wiring lines 19 formed on an upper surface of a semiconductor substrate 11 having a plurality of connection terminals 12 and each having one end connected to a connection terminal 12; a plurality of columnar electrodes 21 each formed on an other upper surface of a re-wiring line 19; an insulating film 15 covering at least side faces of the re-wiring lines 19 and side faces of the columnar electrodes 21 and exposing upper surfaces of the columnar electrodes 21; and a sealing film 22 which seals a surface of the insulating film 15 and exposing the upper surfaces of the columnar electrodes 21. The insulating film 15 is formed by applying and curing a resin material.

Abstract translation: 要解决的问题：提供一种廉价的半导体装置，其防止金属的迁移现象，并提供制造半导体器件的方法。解决方案：半导体器件1包括：多个重新布线19，形成在上部 具有多个连接端子12并且各自具有连接到连接端子12的一端的半导体基板11的表面; 多个柱状电极21，各自形成在再布线19的另一个上表面上; 绝缘膜15，其覆盖重新布线19的至少侧面和柱状电极21的侧面，并且暴露柱状电极21的上表面; 以及密封绝缘膜15的表面并暴露柱状电极21的上表面的密封膜22.绝缘膜15通过施加和固化树脂材料而形成。

公开(公告)号：JP2010225648A

公开(公告)日：2010-10-07

申请号：JP2009068432

申请日：2009-03-19

Applicant: CASIO COMPUTER CO LTD

Inventor： KONO ICHIRO

IPC: H01L23/12 ,  H01L21/301 ,  H01L21/304 ,  H01L21/3205 ,  H01L23/52

Abstract: PROBLEM TO BE SOLVED: To protect an edge at the lower end of side surface of a silicon substrate, and to decrease the height of the entire device. SOLUTION: On a slope 13 recessed in arc that is formed on the side surface of a silicon substrate 1, a side protecting film 14 comprising amorphous silicon, polyimide resin, and the like is provided. By this arrangement, an edge 1a at the lower end of side surface of the silicon substrate 1 can be protected. The lower surface of the lower end of the side protecting film 14 is flush with the lower surface of the silicon substrate 1, so that the height can be decreased as compared with the case in which a resin protecting film is formed on the lower surface of the silicon substrate 1. COPYRIGHT: (C)2011,JPO&INPIT

公开(公告)号：JP2001115282A

公开(公告)日：2001-04-24

申请号：JP29313199

申请日：1999-10-15

Applicant: CASIO COMPUTER CO LTD

Inventor： KONO ICHIRO ,  KAMATA HIDEKI

IPC: B41J2/135 ,  C23F4/00

Abstract: PROBLEM TO BE SOLVED: To provide a method for processing through-holes for dry etching which is capable of easily and exactly detecting the point of just etching time of the through-holes. SOLUTION: A stage 18 for fixing a wafer is cooled by a helicon wave etching device and a gaseous refrigerant is fed between a silicon wafer 19 and the stage 18 in the state of controlling pressure constant, by which the temperature elevation of the silicon wafer 19 during etching is effectively suppressed. The pressure of the gaseous refrigerant is maintained constant by a flow rate controller 24 and an APC 25. When all of the discharge nozzles of the silicon wafer 19 are not penetrated, the flow rate to replenish the component flowing out of the outer peripheral part of the silicon wafer 19 is stable at about 9.4 sccm. When the discharge nozzles begin to be partly penetrated, the flow rate changes sharply up to 9.4 to 97 sccm and after all the discharge nozzles are penetrated, the flow rate stabilizes at about 9.7 sccm. This flow rate stable state is detected and the point of the time the flow rate stable state begins is determined as the point of the just etching time. The prescribed period from the point of this time is determined as an overetching period.

公开(公告)号：JP2000218800A

公开(公告)日：2000-08-08

申请号：JP2337699

申请日：1999-02-01

Applicant: CASIO COMPUTER CO LTD

Inventor： UENISHI KATSUZO ,  SHIODA JUNJI ,  KONO ICHIRO ,  ARAI KAZUYOSHI

IPC: B41J2/05 ,  B41J2/135 ,  B41J2/16

Abstract: PROBLEM TO BE SOLVED: To efficiently form a discharge nozzle at an orifice plate in a short time without generating bonding fault caused by an etching residue. SOLUTION: A thermoplastic polyimide adhesive layer 42a of an upper surface is removed by an organic film etching unit 49 while winding a sheet 38 for a rolled orifice plate having a length of several 10 m obtained by coating both surfaces of a polyimide 41 with thermoplastic polyimide adhesive layers 42a, 42b, and covered with a metal film 44 of 2,000 Å by a vapor deposition unit 50. Thereafter, a composite plating film of about 0,1 to 0.2 μm is formed by a plating solution obtained by mixing and dispersing graphite fluoride fine particles in Ni-plating solution, and a mask metal film of about 0.3 μm of thickness is formed of Ni or Cu. This is laminated on a substrate, a pattern is formed, and etched rapidly by helicon wave etching. Then, a mask metal film 52 is eliminated, and a composite plating film 51 is slightly cut but its thickness of about 1/2 is retained. Thus, water repellency is given.