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    LOW NOISE VERTICAL BIPOLAR TRANSISTOR AND FABRICATION THEREOF
    1.
    发明专利
    LOW NOISE VERTICAL BIPOLAR TRANSISTOR AND FABRICATION THEREOF 失效

    公开(公告)号：JP2000031155A

    公开(公告)日：2000-01-28

    申请号：JP15604999

    申请日：1999-06-03

    Applicant: ST MICROELECTRONICS SA ,  COMMISSARIAT ENERGIE ATOMIQUE

    Inventor： CHANTRE ALAIN ,  MARTY MICHEL ,  DUTARTRE DIDIER ,  MONROY AUGUSTIN ,  LAURENS MICHEL ,  GUETTE FRANCOIS

    IPC: H01L29/73 ,  H01L21/331 ,  H01L29/08 ,  H01L29/737

    Abstract: PROBLEM TO BE SOLVED: To reduce low frequency noise while sustaining accurate current amplification factor by obtaining an emitter region of single crystal silicon touching the upper layer of a stack, e.g. silicon of an upper encapsulation layer of the stack, directly on a window. SOLUTION: On a silicon substrate 1, a buried extrinsic collector layer 2 doped with n+ by implanting arsenic and two buried layers 3 similarly doped with p+ are formed and a thick n-type single crystal silicon layer 4 is grown epitaxially. Subsequently, an amorphous silicon layer 17 is deposited on a semiconductor block thus formed and etched above an oxide layer 6 to form a window 170 which is then subjected to desorption. Thereafter, a stack 8 is formed, a silicon dioxide layer 9 and a silicon nitride layer 10 are deposited thereon and then the layers 9, 10 are removed from a desired zone to obtain an emitter, i.e., an emitter window 800.

    METHOD FOR SELECTIVELY DOPING INTRINSIC COLLECTOR OF VERTICAL BIPOLAR TRANSISTOR HAVING EPITAXIAL BASE
    2.
    发明专利
    METHOD FOR SELECTIVELY DOPING INTRINSIC COLLECTOR OF VERTICAL BIPOLAR TRANSISTOR HAVING EPITAXIAL BASE 失效

    公开(公告)号：JPH11354537A

    公开(公告)日：1999-12-24

    申请号：JP15606599

    申请日：1999-06-03

    Applicant: ST MICROELECTRONICS SA ,  COMMISSARIAT ENERGIE ATOMIQUE

    Inventor： MARTY MICHEL ,  CHANTRE ALAIN ,  SCHARY SCHWARZMANN

    IPC: H01L29/73 ,  H01L21/265 ,  H01L21/331 ,  H01L29/08 ,  H01L29/165 ,  H01L29/737

    Abstract: PROBLEM TO BE SOLVED: To increase the operating speed of a transistor, by executing the injection of a first dopant into the intrinsic collector of the transistor before nonselective epitaxy and the injection of a second dopant into the inner part of the collector at a smaller injected amount and with lower energy than the first dopant through an epitaxially grown stack. SOLUTION: The operating speed of a transistor is the value of the frequency (cut-off frequency of the current amplification factor) of the transistor and the value of the maximum oscillation frequency. The injection of a first dopant into an intrinsic collector 4 in a silicon substrate 1 is executed before the formation of a stack 8 which is formed in an intrinsic base and this injection is high- energy injection. The injection of a second dopant into the collector 4 is executed through an epitaxial base and the injected amount of the second dopant is 1/10 as small as that of the first dopant. Therefore, the defect level in the stack 8 becomes very low and, as a result, a thinner intrinsic base can be obtained and the speed of the transistor increases accordingly.

    PROCEDE D'OPTIMISATION DU RENDEMENT QUANTIQUE D'UNE PHOTODIODE
    10.
    发明专利
    PROCEDE D'OPTIMISATION DU RENDEMENT QUANTIQUE D'UNE PHOTODIODE 未知

    公开(公告)号：FR3018954A1

    公开(公告)日：2015-09-25

    申请号：FR1452334

    申请日：2014-03-20

    Applicant: COMMISSARIAT ENERGIE ATOMIQUE ,  ST MICROELECTRONICS SA

    Inventor： FREY LAURENT ,  MARTY MICHEL

    IPC: H01L31/0232

    Abstract: L'invention concerne un procédé d'optimisation du rendement quantique d'une photodiode dont la partie active (29) est formée dans un substrat en silicium (1) et est recouverte d'un empilement de couches isolantes comprenant successivement au moins une première couche (9) d'oxyde de silicium d'épaisseur comprise entre 5 et 50 nm, une couche antireflet (11) d'épaisseur comprise entre 10 et 80 nm, et une deuxième couche (31) d'oxyde de silicium, le procédé d'optimisation comprenant les étapes suivantes : déterminer pour une longueur d'onde infrarouge des premières épaisseurs (el, e2, e3, e4 ... e8) de la deuxième couche (31) correspondant à des maxima d'absorption (M1, M2, M3, M4 ... M8) de la photodiode, et choisir, parmi les premières épaisseurs, une épaisseur désirée, eoxD, pour que la dispersion maximale de fabrication soit inférieure à la moitié de la pseudo-période séparant deux maxima successifs.

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