公开(公告)号：JPH08288810A

公开(公告)日：1996-11-01

申请号：JP27290595

申请日：1995-10-20

Applicant: CONS RIC MICROELETTRONICA

Inventor： JIYOBUANNI GATSURI ,  JIYUZETSUPE SHITSURA

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/06 ,  H03F1/52 ,  H03K17/08

Abstract: PROBLEM TO BE SOLVED: To provide a method and a circuit for preventing a latch-down phenomenon at a transistor protected from the runaway of its safe operating area(SOA). SOLUTION: By adding a 1st protection circuit PCI(for the runaway of SOA) having a 2nd protection circuit PC2 for driving the control terminal of transistor PT so as not to be affected by a load watched from the output terminal of transistor PT while keeping the value of current flowing through a main conduction path almost constant when that value tends to drop lower than a prescribed downside limit value because of 1st protection in the case of increasing a voltage loaded to the main conduction path of transistor PT, the transistor PT can always supply a correspondent current to the load up to an upside breakdown limit value, VMAX allowable for this transistor PT.