公开(公告)号：DE69942486D1

公开(公告)日：2010-07-22

申请号：DE69942486

申请日：1999-01-14

Applicant: CORNELL RES FOUNDATION INC

Inventor： ADAMS SCOTT G ,  SHAW KEVIN A ,  WEBB RUSSELL Y ,  REED BRYAN W ,  MACDONALD NOEL C ,  DAVIS TIMOTHY J

IPC: B81C1/00 ,  H01L21/00 ,  B81B3/00 ,  H01L21/76 ,  H01L21/762 ,  H01L29/84

公开(公告)号：WO9936941A3

公开(公告)日：2000-02-10

申请号：PCT/US9900784

申请日：1999-01-14

Applicant: CORNELL RES FOUNDATION INC

Inventor： ADAMS SCOTT G ,  SHAW KEVIN A ,  WEBB RUSSELL Y ,  REED BRYAN W ,  MACDONALD NOEL C ,  DAVIS TIMOTHY J

IPC: B81C1/00 ,  B81B3/00 ,  H01L21/76 ,  H01L21/762 ,  H01L29/84 ,  H01L21/00

CPC classification number: H01L21/76224 ,  B81B2203/0118 ,  B81B2203/033 ,  B81C1/00142 ,  B81C1/00698

Abstract: An isolation process which enhances the performance of silicon micromechanical devices incorporates dielectric isolation segments (254, 256) within the silicon microstructure, which is otherwise composed of an interconnected grid of cantilevered beams. A metal layer on top of the beams (276, 278) provides interconnects (244, 246) and also allows contact to the silicon beams. Multiple conduction paths are incorporated through a metal patterning step prior to structure definition. The invention improves manufacturability of previous processes by performing all lithographic patterning steps on flat topographies, and removing complicated metal sputtering steps required of most high aspect ratio processes. With little modification, the invention can be implemented with integrated circuit fabrication sequences for fully integrated devices.

Abstract translation: 提高硅微机械器件性能的隔离工艺在硅微结构内部包含介质隔离段（254,256），否则由互连的悬臂梁组成。 梁（276,278）的顶部上的金属层提供互连（244,246），并且还允许与硅光束的接触。 在结构定义之前，通过金属图案化步骤并入多个导电路径。 本发明通过在平面形貌上进行所有平版印刷图案化步骤，以及去除大多数高纵横比工艺所需的复杂金属溅射步骤，从而提高先前工艺的可制造性。 通过很少的修改，本发明可以用于完全集成的器件的集成电路制造序列。

公开(公告)号：EP1062684A4

公开(公告)日：2006-07-26

申请号：EP99903085

申请日：1999-01-14

Applicant: CORNELL RES FOUNDATION INC

Inventor： ADAMS SCOTT G ,  SHAW KEVIN A ,  WEBB RUSSELL Y ,  REED BRYAN W ,  MACDONALD NOEL C ,  DAVIS TIMOTHY J

IPC: B81C1/00 ,  B81B3/00 ,  H01L21/76 ,  H01L21/762 ,  H01L29/84 ,  H01L21/00

CPC classification number: H01L21/76224 ,  B81B2203/0118 ,  B81B2203/033 ,  B81C1/00142 ,  B81C1/00698

Abstract: An isolation process which enhances the performance of silicon micromechanical devices incorporates dielectric isolation segments (254, 256) within the silicon microstructure, which is otherwise composed of an interconnected grid of cantilevered beams. A metal layer on top of the beams (276, 278) provides interconnects (244, 246) and also allows contact to the silicon beams. Multiple conduction paths are incorporated through a metal patterning step prior to structure definition. The invention improves manufacturability of previous processes by performing all lithographic patterning steps on flat topographies, and removing complicated metal sputtering steps required of most high aspect ratio processes. With little modification, the invention can be implemented with integrated circuit fabrication sequences for fully integrated devices.