CREATION OF LOGICAL APIC ID WITH CLUSTER ID AND INTRA-CLUSTER ID
    1.
    发明申请
    CREATION OF LOGICAL APIC ID WITH CLUSTER ID AND INTRA-CLUSTER ID 审中-公开
    创建带集群ID和集群ID的逻辑APIC ID

    公开(公告)号:WO2009032757A3

    公开(公告)日:2009-05-07

    申请号:PCT/US2008074638

    申请日:2008-08-28

    CPC classification number: G06F13/24

    Abstract: In some embodiments, an apparatus includes logical interrupt identification number creation logic to receive physical processor identification numbers and create logical processor identification numbers through using the physical processor identification numbers. Each of the logical processor identification numbers corresponds to one of the physical processor identification numbers, and the logical processor identification numbers each include a processor cluster identification number and an intra-cluster identification number. The processor cluster identification numbers are each formed to include a group of bits from the corresponding physical processor identification number shifted in position, and the intra-cluster identification numbers are each formed in response to values of others of the bits of the corresponding physical processor identification number. Other embodiments are described.

    Abstract translation: 在一些实施例中,一种装置包括逻辑中断识别号码创建逻辑,以接收物理处理器识别号码并通过使用物理处理器识别号码创建逻辑处理器识别号码。 每个逻辑处理器识别号码对应于物理处理器识别号码中的一个,并且逻辑处理器识别号码每个包括处理器簇识别号码和簇内识别号码。 处理器集群标识号每一个被形成为包括来自对应的位置的相应物理处理器标识号的一组比特,并且每个集群内标识号都是响应于对应物理处理器标识的其他比特的值而形成的 数。 描述了其他实施例。

    METHOD AND APPARATUS FOR TLB SHOOT-DOWN IN A HETEROGENEOUS COMPUTING SYSTEM SUPPORTING SHARED VIRTUAL MEMORY
    2.
    发明申请
    METHOD AND APPARATUS FOR TLB SHOOT-DOWN IN A HETEROGENEOUS COMPUTING SYSTEM SUPPORTING SHARED VIRTUAL MEMORY 审中-公开
    支持共享虚拟内存的异构计算系统中TLB SHOOT-DOWN的方法和设备

    公开(公告)号:WO2013016345A2

    公开(公告)日:2013-01-31

    申请号:PCT/US2012047991

    申请日:2012-07-24

    Abstract: Methods and apparatus are disclosed for efficient TLB (translation look-aside buffer) shoot-downs for heterogeneous devices sharing virtual memory in a multi-core system. Embodiments of an apparatus for efficient TLB shoot-downs may include a TLB to store virtual address translation entries, and a memory management unit, coupled with the TLB, to maintain PASID (process address space identifier) state entries corresponding to the virtual address translation entries. The PASID state entries may include an active reference state and a lazy-invalidation state. The memory management unit may perform atomic modification of PASID state entries responsive to receiving PASID state update requests from devices in the multi-core system and read the lazy-invalidation state of the PASID state entries. The memory management unit may send PASID state update responses to the devices to synchronize TLB entries prior to activation responsive to the respective lazy-invalidation state.

    Abstract translation: 公开了用于在多核系统中共享虚拟存储器的异构设备的有效TLB(转换后备缓冲器)击穿的方法和装置。 用于有效的TLB击倒的装置的实施例可以包括用于存储虚拟地址转换条目的TLB和与TLB耦合的存储器管理单元,以维护对应于虚拟地址转换条目的PASID(进程地址空间标识符)状态条目 。 PASID状态条目可以包括活动参考状态和惰性无效状态。 响应于从多核系统中的设备接收到PASID状态更新请求并且读取PASID状态条目的惰性无效状态,存储器管理单元可执行PASID状态条目的原子修改。 存储器管理单元可以在响应于相应的惰性无效化状态的激活之前向设备发送PASID状态更新响应以同步TLB条目。

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