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公开(公告)号:US20170203960A1
公开(公告)日:2017-07-20
申请号:US15327902
申请日:2015-08-20
Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.
Inventor: Errong JING
CPC classification number: B81B7/02 , B81B2201/0278 , B81B2203/0118 , B81C1/00 , B81C1/0015 , B81C2201/0197 , G01J1/04 , G01J1/42 , G01J5/024 , G01J5/0853
Abstract: A method for manufacturing a MEMS double-layer suspension microstructure comprises steps of: forming a first film body on a substrate, and a cantilever beam connected to the substrate and the first film body; forming a sacrificial layer on the first film body and the cantilever beam; patterning the sacrificial layer located on the first film body to manufacture a recessed portion used for forming a support structure, the bottom of the recessed portion being exposed of the first film body; depositing a dielectric layer on the sacrificial layer; patterning the dielectric layer to manufacture a second film body and the support structure, the support structure being connected to the first film body and the second film body; and removing the sacrificial layer to obtain the MEMS double-layer suspension microstructure.
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公开(公告)号:US20170174508A1
公开(公告)日:2017-06-22
申请号:US15327230
申请日:2015-07-31
Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.
Inventor: Errong JING
CPC classification number: B81C1/00182 , B81B3/0021 , B81B2203/0118 , B81B2203/0315 , B81B2203/04 , B81B2203/058 , B81C1/00603 , B81C2201/0109 , B81C2201/0111
Abstract: A method for manufacturing an MEMS torsional electrostatic actuator comprises: providing a substrate, wherein the substrate comprises a first silicon layer, a buried oxide layer and a second silicon layer that are laminated sequentially; patterning the first silicon layer and exposing the buried oxide layer to form a rectangular upper electrode plate separated from a peripheral region, wherein the upper electrode plate and the peripheral region are connected by only using a cantilever beam, and forming, on the peripheral region, a recessed portion exposing the buried oxide layer; patterning the second silicon layer and exposing the buried oxide layer to form a back cavity, wherein the back cavity is located in a region of the second silicon layer corresponding to the upper electrode plate, covers 40% to 60% of the area of the region corresponding to the upper electrode plate, and is close to one end of the cantilever beam; exposing the second silicon layer, and suspending the upper electrode plate and the cantilever beam; and respectively forming an upper contact electrode and a lower contact electrode on the second silicon layer.
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公开(公告)号:US20170113930A1
公开(公告)日:2017-04-27
申请号:US15315640
申请日:2015-08-19
Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.
Inventor: Errong JING
IPC: B81C3/00
CPC classification number: B81C3/004 , B81C1/00 , B81C1/00603 , B81C3/00 , B81C2203/051 , G03F9/00 , H01L21/68
Abstract: A positioning method in a microprocessing process of bulk silicon comprises the steps of: fabricating, on a first surface of a first substrate (10), a first pattern (100), a stepper photo-etching machine alignment mark (200) for positioning the first pattern, and a double-sided photo-etching machine first alignment mark (300) for positioning the stepper photo-etching machine alignment mark; fabricating, on a second surface, opposite to the first surface, of the first substrate, a double-sided photo-etching machine second alignment mark (400) corresponding to the double-sided photo-etching machine first alignment mark; bonding a second substrate (20) on the first surface of the first substrate; performing thinning on a first surface of the second substrate; fabricating, on the first surface of the second substrate, a double-sided photo-etching machine third alignment mark (500) corresponding to the double-sided photo-etching machine second alignment mark; and finding, on the first surface of the second substrate by using the double-sided photo-etching machine third alignment mark, a corresponding position of the stepper photo-etching machine alignment mark.
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