Abstract:
A system management module (SMM) for a host server svstem includes a system management processor (SMP) connected to a system management local bus. The system management local bus connects to the system PCI bus through a system management central (SMC). The SMC includes the main arbitration unit for the PCI bus and also includes the arbiter for the system management local bus. The SMM includes a video controller and/or keyboard and mouse controller connected to the system management local bus to support remote consoling of the SMM. The SMC includes logic to monitor PCI cycles and to issue error signals in the event of a system error. The SMC also isolates failed components by masking request grant and interrupt lines for the failed device. Further, if a spare component is provided, the SMC permits dynamic switching to the spare. In addition to detecting errors and performing survival and maintenance operations, the SMC enhances system performance during normal operations by supporting master-target priority determinations to more efficiently arbitrate mastership of system busses such as the PCI bus.
Abstract:
Faults in a computer system having circuits are managed by fault detectors connected to detect fault states of respective circuits. A fault manager associates the fault states with the respective circuits. The fault manager includes a system manager connected to identify which of the circuits is causing faulty operation in the computer system. The fault detectors associated with the respective circuits are configured to detect faulty operation of and to generate fault state information for the respective circuits. A central manager is connected to accumulate fault state information from the fault detectors. One of the circuits includes a bus, and the fault state includes a bus error condition. The bus is connected to multiple devices, and the fault manager identifies which of the multiple devices causes the bus error condition. One of the circuits includes multiple modules, and the fault manager identifies fault states of the multiple modules. The modules include state machines. One of the circuits includes an internal clock, and the fault state of the circuit includes the internal clock not functioning properly. One of the circuits includes a temperature sensor, and the fault state of the circuit includes a high temperature condition detected by the temperature sensor.
Abstract:
A system management module (SMM) for a host server svstem includes a system management processor (SMP) connected to a system management local bus. The system management local bus connects to the system PCI bus through a system management central (SMC). The SMC includes the main arbitration unit for the PCI bus and also includes the arbiter for the system management local bus. The SMM includes a video controller and/or keyboard and mouse controller connected to the system management local bus to support remote consoling of the SMM. The SMC includes logic to monitor PCI cycles and to issue error signals in the event of a system error. The SMC also isolates failed components by masking request grant and interrupt lines for the failed device. Further, if a spare component is provided, the SMC permits dynamic switching to the spare. In addition to detecting errors and performing survival and maintenance operations, the SMC enhances system performance during normal operations by supporting master-target priority determinations to more efficiently arbitrate mastership of system busses such as the PCI bus.