公开(公告)号：EP0307649A2

公开(公告)日：1989-03-22

申请号：EP88113497.7

申请日：1988-08-19

Applicant: Compaq Computer Corporation

Inventor： McGraw, Montgomery C. ,  Perez, Lazaro D. ,  Thayer, John S. ,  Bryant, Raymond J.

IPC: G06F12/06

CPC classification number: G06F12/063

Abstract: A data processing system is disclosed which permits the use of a memory mapped floating point coprocessor or other such peripheral, by a process which is unable to ad­dress the peripheral's resident memory location but which is able to address a specified location. Memory mapping means intercept attempted accesses by the process to the specified location and diverts the process's access in­struction to cause it to access the corresponding mapped address instead. An illustrative implementation is also described, namely the use of a Weitek 1167 memory-mapped, floating point coprocessor by processes running in the "virtual mode" of an Intel 80386 CPU.

Abstract translation: 一种数据处理系统是圆盘游离缺失允许使用存储器的映射浮点协处理器或其他外围检查，由一个进程的所有其不能处理外设的常驻存储器位置，但所有这些都能够解决一个指定的位置。 存储器映射装置截距试图通过所述进程访问到指定的位置和转移的过程中的接入指示，以使其代替访问对应的映射地址。 说明性实施方式是通过在英特尔公司的80386 CPU的“虚拟模式”运行的进程这样描述的，即利用一个Weitek 1167内存映射，浮点协处理器的。

公开(公告)号：EP0358330A1

公开(公告)日：1990-03-14

申请号：EP89307986.3

申请日：1989-08-04

Applicant: Compaq Computer Corporation

Inventor： Culley, Paul R. ,  McGraw, Montgomery Co. ,  Walker, Karl N. ,  Perez, Lazaro D.

IPC: G06F13/24

CPC classification number: G06F13/24

Abstract: A computer system includes a programmable interrupt controller (I) wherein individual interrupt levels can be programmed to receive edge or level sensed interrupt signals. The controller includes a programmable register (28) for storing the interrupt level designations for each interrupt level and associated interrupt recognition logic.

Abstract translation: 计算机系统包括可编程中断控制器（I），其中各个中断级别可被编程以接收边缘或电平感测的中断信号。 该控制器包括一个可编程寄存器（28），用于存储每个中断级别和相关联的中断识别逻辑的中断级别标识。

公开(公告)号：EP0307649A3

公开(公告)日：1990-08-08

申请号：EP88113497.7

申请日：1988-08-19

Applicant: Compaq Computer Corporation

Inventor： McGraw, Montgomery C. ,  Perez, Lazaro D. ,  Thayer, John S. ,  Bryant, Raymond J.

IPC: G06F12/06

CPC classification number: G06F12/063

Abstract: A data processing system is disclosed which permits the use of a memory mapped floating point coprocessor or other such peripheral, by a process which is unable to ad­dress the peripheral's resident memory location but which is able to address a specified location. Memory mapping means intercept attempted accesses by the process to the specified location and diverts the process's access in­struction to cause it to access the corresponding mapped address instead. An illustrative implementation is also described, namely the use of a Weitek 1167 memory-mapped, floating point coprocessor by processes running in the "virtual mode" of an Intel 80386 CPU.