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公开(公告)号：EP2137900A4
公开(公告)日：2011-11-23
申请号：EP08779275
申请日：2008-04-25
Applicant: ERICSSON TELEFON AB L M
Inventor： KLING LARS-OERJAN , NYSTROEM KJELL , JOHANSSON THOMAS STIG
CPC classification number: H04N21/47202 , H04N21/232 , H04N21/26233
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公开(公告)号：EP2532137A4
公开(公告)日：2014-04-23
申请号：EP10845359
申请日：2010-02-05
Applicant: ERICSSON TELEFON AB L M
Inventor： PUTHALATH HAREESH , HELLKVIST STEFAN , KLING LARS-OERJAN
CPC classification number: H04L67/2842 , G06F8/4441 , G06F8/4442 , G06F12/08 , H04L67/02 , H04L67/1095
Abstract: The present invention provides a method and a caching node entity for ensuring at least a predetermined number of a content object to be kept stored in a network, comprising a plurality of cache nodes for storing copies of content objects. The present invention makes use of ranking states values, deletable or non-deletable, which when assigned to copies of content objects are indicating whether a copy is either deletable or non-deletable. At least one copy of each content object is assigned the value non-deletable. The value for a copy of a content object changing from deletable to non-deletable in one cache node of the network, said copy being a candidate for the value non-deletable, if a certain condition is fulfilled.
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公开(公告)号：WO9946675A3
公开(公告)日：1999-12-02
申请号：PCT/EP9901587
申请日：1999-03-11
Applicant: ERICSSON TELEFON AB L M , GARD BENGT ERIK INGEMAR , KLING LARS OERJAN , JOHNSSON STEN EDVARD
Inventor： GARD BENGT ERIK INGEMAR , KLING LARS-OERJAN , JOHNSSON STEN EDVARD
CPC classification number: G11C29/74 , G06F8/67 , G06F11/1433
Abstract: To provide an approach to software update with scaleable disturbance there is proposed a state copying method for a computation system with at least two logic partitions wherein a state of new software in a standby partition (6, 16) is updated to the state of old software in an executing partition (16, 6) while continuing execution of the old software. Data is transferred from the executing partition to the standby partition in a scaleable way and as soon as the same state is achieved for the standby partition (6, 16) and the executing partition (16, 6) the execution is switched to the new software. This allows to scale the degree of disturbance due to the software update to what is deemed suitable.
Abstract translation: 为了提供具有可缩放干扰的软件更新的方法，提出了一种用于具有至少两个逻辑分区的计算系统的状态复制方法，其中备用分区（6,16）中的新软件的状态被更新为旧软件的状态 在执行分区（16,6）中，同时继续执行旧软件。 数据以可扩展的方式从执行分区传输到备用分区，一旦达到待机分区（6,16）和执行分区（16,6）的相同状态，执行切换到新软件 。 这允许将由于软件更新而引起的干扰程度缩放到被认为合适的程度。
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公开(公告)号：WO9946673A3
公开(公告)日：1999-11-04
申请号：PCT/EP9901586
申请日：1999-03-11
Applicant: ERICSSON TELEFON AB L M , GARD BENGT ERIK INGEMAR , KLING LARS OERJAN , JOHNSSON STEN EDVARD
Inventor： GARD BENGT ERIK INGEMAR , KLING LARS-OERJAN , JOHNSSON STEN EDVARD
CPC classification number: G06F8/67 , Y10S707/99945
Abstract: To improve the efficiency for an update process in a software processing device with a plurality of memory partitions (4, 14), it is proposed to continue the execution of old software on original data stored in a first memory partition (4) and to update new software and related data in a second memory partition (14). In case the same state for data of old and new software is achieved (S4), an instant switch of services to the new software as far as the same state is achieved (S5) takes place. This processing is repeated (S6) until no data to be transferred remains (S6) in the first memory partition. Thus, the present invention allows for a considerable improvement of the update efficiency with reduced disturbances during data transfer.
Abstract translation: 为了提高具有多个存储器分区（4,14）的软件处理装置中的更新处理的效率，建议继续对存储在第一存储器分区（4）中的原始数据执行旧软件并更新 第二存储分区（14）中的新软件和相关数据。 在新旧软件的数据达到相同状态（S4）的情况下，就可以实现到达新软件的即时服务切换（S5）。 重复该处理（S6），直到在第一存储器分区中没有要传输的数据（S6）为止。 因此，本发明允许在数据传送期间减少干扰的情况下提高更新效率。
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公开(公告)号：WO9946676A3
公开(公告)日：1999-11-11
申请号：PCT/EP9901590
申请日：1999-03-11
Applicant: ERICSSON TELEFON AB L M , GARD BENGT ERIK INGEMAR , KLING LARS OERJAN , JOHNSSON STEN EDVARD
Inventor： GARD BENGT ERIK INGEMAR , KLING LARS-OERJAN , JOHNSSON STEN EDVARD
CPC classification number: G06F8/67 , G06F11/1433
Abstract: To achieve a highly efficient update of software in computer based systems, there is provided a software processing system comprising two partitions (A, B) that are connected through a linking means (24). The two partitions (A, B) are adapted to update a state of new software in one memory means (12) to the sate of old software in the other memory means (32) during the execution of the old software. In particular, the transfer of data from old software to new software is supported by a data conversions support device (50) adapted to output the start address of a conversion program being related to a data variable to be converted.
Abstract translation: 为了实现基于计算机的系统中的软件的高效更新，提供了包括通过链接装置（24）连接的两个分区（A，B）的软件处理系统。 两个分区（A，B）适于在执行旧软件期间将一个存储器装置（12）中的新软件的状态更新为另一个存储器装置（32）中旧软件的状态。 特别地，数据转换支持装置（50）支持从旧软件到新软件的数据传送，所述数据转换支持装置适于输出与要转换的数据变量有关的转换程序的开始地址。
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Patent Agency Ranking
公开(公告)号：WO9946678A2
公开(公告)日：1999-09-16
申请号：PCT/EP9901589
申请日：1999-03-11
Applicant: ERICSSON TELEFON AB L M , GARD BENGT ERIK INGEMAR , KLING LARS OERJAN , JOHNSSON STEN EDVARD
Inventor： GARD BENGT ERIK INGEMAR , KLING LARS-OERJAN , JOHNSSON STEN EDVARD
CPC classification number: H04L41/082 , G06F8/67 , H04L69/40
Abstract: To achieve a highly efficient upgrade of software in computer based systems a message conversion apparatus (34) comprises an interface unit (36) for message conversion information (MCI) describing at least one message being exchanged in a software processing system before and after an upgrade of the software processing system. Also, a message conversion means (38, 40) is provided to convert the message between old and new representation for the upgraded software processing system in compliance with the specifications given in the message conversion information (MCI). Therefore, it is possible to introduce a disturbance free upgrade of software in computer based systems with minimized system downtime.
Abstract translation: 为了在基于计算机的系统中实现软件的高效升级，消息转换装置（34）包括用于描述在升级之前和之后在软件处理系统中交换的至少一个消息的消息转换信息（MCI）的接口单元（36） 的软件处理系统。 此外，提供消息转换装置（38,40），以根据消息转换信息（MCI）中给出的规范在升级的软件处理系统的旧和新表示之间转换消息。 因此，可以在基于计算机的系统中引入软件无干扰升级，并将系统停机时间降到最低。
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公开(公告)号：DE69940784D1
公开(公告)日：2009-06-10
申请号：DE69940784
申请日：1999-11-12
Applicant: ERICSSON TELEFON AB L M
Inventor： HOLMBERG PER ANDERS , KLING LARS-OERJAN , JOHNSON STEN EDWARD , EGELAND TERJE
Abstract: In general, the invention is directed towards a multiprocessing system in which jobs are speculatively executed in parallel by multiple processors (30-1, 30-2, ..., 30-N). By speculating on the existence of more coarse-grained parallelism, so-called job-level parallelism, and backing of to sequential execution only in cases where dependencies that prevent parallel execution of jobs are detected, a high degree of parallelism can be extracted. According to the invention a private memory buffer is speculatively allocated for holding results, such as a communication message, an operation system call or a new job signal, of a speculatively executed job, and these results are speculatively written directly into the allocated memory buffer. When commit priority is assigned to the speculatively executed job, a pointer referring to the allocated memory buffer is transferred to an input/output (10) device which may access the memory buffer by means of the transferred pointer. In this way, by speculatively writing messages and signals into private memory buffers, even further parallelism can be extracted.
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公开(公告)号：DE19810843A1
公开(公告)日：1999-09-30
申请号：DE19810843
申请日：1998-03-12
Applicant: ERICSSON TELEFON AB L M
Inventor： GARD BENGT ERIK INGEMAR , JOHNSSON STEN EDVARD , KLING LARS-OERJAN
Abstract: The invention relates to a method and an access means for determining the storage address of a predetermined data value in a memory device. The data values are stored in an increasing order sequentially in a column direction according to a binary tree data structure. A new subtree root node is calculated from the previous leaf node address when the data value to be searched is not located in the previous subtree. Since a new subtree root node is always calculated from a previous leaf node address and the comparison result between the searched and read out value, the number of row address changes can be kept to a minimum whilst a high speed for the subtree searching is maintained. The search method and the access means is memory efficient since no pointers are used and fast, since the address of a next memory location to be investigated can always be calculated from the previous address and the last comparison result.
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公开(公告)号：IE61306B1
公开(公告)日：1994-10-19
申请号：IE250587
申请日：1987-09-16
Applicant: ERICSSON TELEFON AB L M
Inventor： JONSSON BJOERN RUTGER ERIK , JOHNSON STEN EDVARD , KLING LARS-OERJAN , AVSAN OLEG
IPC: G06F20060101 , G06F9/30 , G06F9/38 , G06F13/10 , G06F15/16 , G06F15/177
Abstract: PCT No. PCT/SE87/00437 Sec. 371 Date May 17, 1988 Sec. 102(e) Date May 17, 1988 PCT Filed Sep. 28, 1987 PCT Pub. No. WO88/02513 PCT Pub. Date Apr. 7, 1988.A data processing system which executes two instruction sequences in an order determined in advance. With the aid of instructions, a main memory common to both sequences is activated for data information reading/writing. Increased data handling capacity is achieved in the following manner: both sequences are executed in parallel to start with. During execution of the first sequence, the main memory is prevented from being activated for writing due to the second sequence write instructions. A write address and data information included in a write instruction associated with the second sequence are intermediately stored. The intermediately stored write address is compared with the read addresses of the second sequence, and data information is prevented from being read from the main memory in response to an identity of the addresses, the intermediately stored data information being read instead. An address included in a read instruction associated with the second sequence is intermediately stored if this address has not been previously selected in conjuction with a write instruction associated with the second sequence. The intermediately stored read address is compared with the write address of the first sequence and execution of the second sequence is restarted in response to an identity of the addresses.
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公开(公告)号：AT73940T
公开(公告)日：1992-04-15
申请号：AT87906632
申请日：1987-09-28
Applicant: ERICSSON TELEFON AB L M
Inventor： JOHNSON STEN EDVARD , KLING LARS-OERJAN
IPC: G06F9/38
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