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    ION SOURCE CLEANING IN SEMICONDUCTOR PROCESSING SYSTEMS
    3.
    发明专利
    ION SOURCE CLEANING IN SEMICONDUCTOR PROCESSING SYSTEMS 未知

    公开(公告)号：SG188150A1

    公开(公告)日：2013-03-28

    申请号：SG2013010889

    申请日：2009-02-11

    Applicant: ADVANCED TECH MATERIALS ,  SWEENEY JOSEPH D ,  YEDAVE SHARAD N ,  BYL OLEG ,  KAIM ROBERT ,  ELDRIDGE DAVID ,  SERGI STEVEN ,  FENG LIN ,  BISHOP STEVEN E ,  OLANDER KARL W ,  TANG YING

    Inventor： SWEENEY JOSEPH D ,  YEDAVE SHARAD N ,  BYL OLEG ,  KAIM ROBERT ,  ELDRIDGE DAVID ,  SERGI STEVEN ,  FENG LIN ,  BISHOP STEVEN E ,  OLANDER KARL W ,  TANG YING

    Abstract: ION SOURCE CLEANING IN SEMICONDUCTOR PROCESSING SYSTEMSCleaning of an ion implantation system or components thereof, utilizing a reactive cleaning reagent enabling growth/etching of the filament in an ion source of the arc chamber, by appropriate control of temperature in the arc chamber to effect the desired filament growth or alternative filament etching. Also described is the use of reactive gases such as XeFx, WFx, AsFx, PFx and TaFx, wherein x has a stoichioimetrically appropriate value or range of values, for cleaning regions of ion implanters, or components of implanters, in in situ or ex situ cleaning arrangements, under ambient temperature, elevated temperature or plasma conditions. Among specific reactive cleaning agents, BrF3 is described as useful for cleaning ion implant systems or component(s) thereof, in in situ or ex situ cleaning arrangements. Also described is a method of cleaning the forelines of an ion implant system for at least partial removal of ionization-related deposit from said forelines, comprising contacting said forelines with a cleaning gas wherein said cleaning gas is chemically reactive with said deposit. Also described is a method of improving the performance and extending the lifetime of an ion implant system, comprising contacting the cathode with a gas mixture.[ No Suitable Figure ]

    Memory protection device and computer
    4.
    发明专利
    Memory protection device and computer 未知

    公开(公告)号：AU2010282012A1

    公开(公告)日：2012-04-05

    申请号：AU2010282012

    申请日：2010-07-26

    Applicant: FENG LIN

    Inventor： FENG LIN

    IPC: G06F1/16

    Abstract: A memory protection device and a computer comprising the protection device are disclosed. The memory protection device comprises insulated heat conduction strips, which are mounted on the tops of the slot arms of the both sides of the memory connecting base and cover the heat conduction holes of the slot arms.

    ION SOURCE CLEANING IN SEMICONDUCTOR PROCESSING SYSTEMS
    6.
    发明申请
    ION SOURCE CLEANING IN SEMICONDUCTOR PROCESSING SYSTEMS 审中-公开
    半导体加工系统中的离子源清洁

    公开(公告)号：WO2009102762A3

    公开(公告)日：2009-11-12

    申请号：PCT/US2009033754

    申请日：2009-02-11

    Applicant: SWEENEY JOSEPH D ,  YEDAVE SHARAD N ,  BYL OLEG ,  KAIM ROBERT ,  ELDRIDGE DAVID ,  SERGI STEVEN ,  FENG LIN ,  BISHOP STEVEN E ,  OLANDER KARL W ,  TANG YING

    Inventor： SWEENEY JOSEPH D ,  YEDAVE SHARAD N ,  BYL OLEG ,  KAIM ROBERT ,  ELDRIDGE DAVID ,  SERGI STEVEN ,  FENG LIN ,  BISHOP STEVEN E ,  OLANDER KARL W ,  TANG YING

    IPC: H01L21/265

    CPC classification number: H01J37/3171 ,  C23C14/48 ,  C23C14/54 ,  C23C14/564 ,  H01J37/08 ,  H01J37/16 ,  H01J37/18 ,  H01J2237/082 ,  H01J2237/22

    Abstract: Cleaning of an ion implantation system or components thereof, utilizing a reactive cleaning reagent enabling growth/etching of the filament in an ion source of the arc chamber, by appropriate control of temperature in the arc chamber to effect the desired filament growth or alternative filament etching. Also described is the use of reactive gases such as XeFx, WFx, AsFx, PFx and TaFx, wherein x has a stoichioimetrically appropriate value or range of values, for cleaning regions of ion implanters, or components of implanters, in in situ or ex situ cleaning arrangements, under ambient temperature, elevated temperature or plasma conditions. Among specific reactive cleaning agents, BrF3 is described as useful for cleaning ion implant systems or component(s) thereof, in in situ or ex situ cleaning arrangements. Also described is a method of cleaning the forelines of an ion implant system for at least partial removal of ionization-related deposit from said forelines, comprising contacting said forelines with a cleaning gas wherein said cleaning gas is chemically reactive with said deposit. Also described is a method of improving the performance and extending the lifetime of an ion implant system, comprising contacting the cathode with a gas mixture.

    Abstract translation: 使用能够在电弧室的离子源中生长/蚀刻细丝的反应性清洁剂来清洁离子注入系统或其组分，通过适当地控制电弧室中的温度以实现所需的长丝生长或替代的细丝蚀刻 。 还描述了使用诸如XeFx，WFx，AsFx，PFx和TaFx的反应性气体，其中x具有化学计量学上适当的值或值范围，用于清除离子注入器或植入物的组分的原位或非原生境 清洁布置，在环境温度，升高的温度或等离子体条件下。 在特定的反应性清洁剂中，BrF3被描述为用于在原位或非原位清洁装置中清洁离子注入系统或其组分。 还描述了一种清洁离子注入系统的前沿以从所述前线至少部分去除电离相关沉积物的方法，包括使所述前沿与清洁气体接触，其中所述清洁气体与所述沉积物化学反应。 还描述了改进离子注入系统的性能和延长寿命的方法，包括使阴极与气体混合物接触。

    DELAY-LOCK LOOP AND METHOD ADAPTING ITSELF TO OPERATE OVER A WIDE FREQUENCY RANGE
    7.
    发明申请
    DELAY-LOCK LOOP AND METHOD ADAPTING ITSELF TO OPERATE OVER A WIDE FREQUENCY RANGE 有权
    延迟锁定环路和方法适应其在宽频范围内的操作

    公开(公告)号：US20110221500A1

    公开(公告)日：2011-09-15

    申请号：US13112730

    申请日：2011-05-20

    Applicant: FENG LIN

    Inventor： FENG LIN

    IPC: H03K3/00

    CPC classification number: G11C29/02 ,  G11C7/20 ,  G11C7/22 ,  G11C7/222 ,  G11C11/4072 ,  G11C11/4076 ,  G11C29/023 ,  G11C29/028 ,  G11C29/50012 ,  G11C2029/0409

    Abstract: A delay-lock loop receives an input clock signal from the output of a programmable divider that receives a reference clock signal. The delay-lock loop includes a voltage-controlled delay line generating a plurality of delayed clock signals having different phases. A plurality of the delayed clock signals are combined to generate a plurality of output signals. During an initialization period, an initialization circuit sets the delay of the delay line to a minimum delay value and then compares this delay value to the period of the input clock signal. Based on this comparison, the initialization circuit programs the programmable divider and adjusts the number of delayed clock signals combined to generate the output signals. More specifically, as the frequency of the reference clock signal increases, the divider is programmed to divide by a greater number, and a larger number of delay clock signals are combined to generate the output signals.

    Abstract translation: 延迟锁定环路接收来自接收参考时钟信号的可编程分频器的输出端的输入时钟信号。 延迟锁定环包括产生具有不同相位的多个延迟时钟信号的电压控制延迟线。 多个延迟的时钟信号被组合以产生多个输出信号。 在初始化期间，初始化电路将延迟线的延迟设定为最小延迟值，然后将该延迟值与输入时钟信号的周期进行比较。 基于该比较，初始化电路对可编程分频器进行编程，并调整组合的延迟时钟信号的数量以产生输出信号。 更具体地，随着参考时钟信号的频率增加，分频器被编程为除以更大的数量，并且更大数量的延迟时钟信号被组合以产生输出信号。

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