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    METHOD FOR PRODUCING VERTICAL ELECTRICAL CONTACT CONNECTIONS IN SEMICONDUCTOR WAFERS
    1.
    发明申请
    METHOD FOR PRODUCING VERTICAL ELECTRICAL CONTACT CONNECTIONS IN SEMICONDUCTOR WAFERS 审中-公开
    工艺用于制造半导体晶圆垂直电联系我们友情链接

    公开(公告)号：WO2006128898A9

    公开(公告)日：2008-01-31

    申请号：PCT/EP2006062824

    申请日：2006-06-01

    Applicant: FORSCHUNGSVERBUND BERLIN EV ,  KRUEGER OLAF ,  WUERFL JOACHIM ,  SCHOENE GERD

    Inventor： KRUEGER OLAF ,  WUERFL JOACHIM ,  SCHOENE GERD

    IPC: H01L21/768

    CPC classification number: H01L21/76898

    Abstract: The invention relates to a method for producing vertical electrical connections (micro-vias) in semiconductor wafers for the fabrication of semiconductor components. The method is characterized by the following steps: - application of a protective resist to the wafer front side - patterning of the protective resist on the wafer front side such that the contacts to be connected to the wafer rear side become free - laser drilling of passage holes at the contact connection locations from the wafer rear side through the semiconductor substrate, the active layers and the contacts to be connected on the wafer front side - cleaning of the wafer (debris removal) - application of a plating base to the wafer rear side and into the laser-drilled passage holes - application of gold by electrodeposition onto the metallized wafer rear side and the passage holes - resist stripping of the protective resist - application of an antiwetting layer in the region of the entrance openings of the passage holes at the wafer rear side.

    Abstract translation: 本发明涉及一种制造用于半导体器件的制造中的半导体晶片的垂直电接触连接（微通孔）的方法。 该方法的特征在于以下步骤： - 在晶片前表面上施加保护涂层 - 构建在晶片前侧，使得与在晶片背侧触点连接保护清漆自由 - 激光通孔在所述的接触连接点钻 晶片背面通过半导体基板侧，有源层和接触被连接在晶片前侧 - 在晶片的清洗（除去碎片） - 将电镀基座到晶片背面侧并进入激光通孔钻 - 金电镀施加到金属化 晶片背面和贯通孔 - 涂料去除保护清漆 - 的穿过晶片背面上的孔中的入口开口的区域施加一个反润湿层。

    3.
    发明专利
    未知

    公开(公告)号：DE102005042074A1

    公开(公告)日：2007-03-08

    申请号：DE102005042074

    申请日：2005-08-31

    Applicant: FORSCHUNGSVERBUND BERLIN EV

    Inventor： KRUEGER OLAF ,  SCHOENE GERD ,  JOHN WILFRED ,  WERNICKE TIM ,  WUERFL JOACHIM

    IPC: H01L21/60 ,  B23K26/40

    Abstract: The invention relates to a method for producing vertical through-contacts (micro-vias) in semi-conductor wafers in order to produce semi-conductor components, i.e. contacts on the front side of the wafer through the semi-conductor wafer to the rear side of the wafer. The invention also relates to a method which comprises the following steps: blind holes on the contact connection points are laser drilled from the rear side of the wafer into the semi-conductor substrate, the wafer is cleaned, the semi-conductor substrate is plasma etched in a material selected manner until the active layer stack of the wafer is reached, the active layer stack of the wafer is plasma etched in a material selective manner until the contacts, which are to be connected to the rear side of the wafer, are reached, a plating base is applied to the rear side of the wafer and into the blind holes and gold is applied by electrodeposition onto the metallizied rear side of the wafer and the blind holes.

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