High frequency energy source
    2.
    发明公开
    High frequency energy source 失效
    RF电源。

    公开(公告)号:EP0185908A2

    公开(公告)日:1986-07-02

    申请号:EP85114445.1

    申请日:1985-11-13

    Abstract: @ Energy source of a low power high frequency oscillator section (10) driving a high power high gain amplifier section (12). The amplifier section (12) includes one or more SIT's (Q2). The dc operating potential is applied. to the drain electrode of one of the SIT's (Q2) and is supplied to the other through a dc path from the source electrode of the one SITto the drain electrode of the other. Operating potential from the dc biasing network between the source and gate electrode of an SIT (Q2) in the amplifier section is conducted through a dc path to a transistor (Q1) in the oscillator section (10) to provide operating power for the oscillator section (10). The oscillator output is connected through a high freouency coupling dc blocking path to the amplifier input to provide a drive signal to be amplified and extracted at the amplifier output (14).

    High frequency energy source
    3.
    发明公开
    High frequency energy source 失效
    高频能源

    公开(公告)号:EP0185908A3

    公开(公告)日:1987-12-02

    申请号:EP85114445

    申请日:1985-11-13

    Abstract: @ Energy source of a low power high frequency oscillator section (10) driving a high power high gain amplifier section (12). The amplifier section (12) includes one or more SIT's (Q2). The dc operating potential is applied. to the drain electrode of one of the SIT's (Q2) and is supplied to the other through a dc path from the source electrode of the one SITto the drain electrode of the other. Operating potential from the dc biasing network between the source and gate electrode of an SIT (Q2) in the amplifier section is conducted through a dc path to a transistor (Q1) in the oscillator section (10) to provide operating power for the oscillator section (10). The oscillator output is connected through a high freouency coupling dc blocking path to the amplifier input to provide a drive signal to be amplified and extracted at the amplifier output (14).

    High frequency amplifier
    5.
    发明公开
    High frequency amplifier 失效
    高频放大器

    公开(公告)号:EP0160223A3

    公开(公告)日:1987-11-25

    申请号:EP85103902

    申请日:1985-04-01

    CPC classification number: H03F1/0283 H03F3/1935

    Abstract: High voltage, high frequency amplifier employing power transistors. The amplifier provides parallel ac signal amplification paths through each transistor and a single dc power path through the transistors in series. In one embodiment two FET's (Q1 and Q2) have their source electrodes connected to an input terminal (10) and their drain electrodes connected to an output terminal (11) so as to provide two parallel ac amplifying paths while blocking dc current flow. The drain electrode of the first FET (Q1) is connected through an RF choke (L1) to a source of dc operating potential (V DD ), and its source electrode is connected through an RF choke (L2 and L3) to the drain electrode of the second FET (Q2). The gate electrode of the second FET (Q2) is connected to ground. A single dc conductive path is thus provided between the source of operating potential (V DD ) and ground through the two FET's (Q1 and Q2) in series.

    High frequency amplifier
    6.
    发明公开
    High frequency amplifier 失效
    RF放大器。

    公开(公告)号:EP0160223A2

    公开(公告)日:1985-11-06

    申请号:EP85103902.4

    申请日:1985-04-01

    CPC classification number: H03F1/0283 H03F3/1935

    Abstract: High voltage, high frequency amplifier employing power transistors. The amplifier provides parallel ac signal amplification paths through each transistor and a single dc power path through the transistors in series. In one embodiment two FET's (Q1 and Q2) have their source electrodes connected to an input terminal (10) and their drain electrodes connected to an output terminal (11) so as to provide two parallel ac amplifying paths while blocking dc current flow. The drain electrode of the first FET (Q1) is connected through an RF choke (L1) to a source of dc operating potential (V DD ), and its source electrode is connected through an RF choke (L2 and L3) to the drain electrode of the second FET (Q2). The gate electrode of the second FET (Q2) is connected to ground. A single dc conductive path is thus provided between the source of operating potential (V DD ) and ground through the two FET's (Q1 and Q2) in series.

Patent Agency Ranking