公开(公告)号：US20240356302A1

公开(公告)日：2024-10-24

申请号：US18136404

申请日：2023-04-19

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhuojie Wu ,  Koushik Ramachandran ,  Yunyao Jiang

IPC: H01S5/0237 ,  G02B6/12

CPC classification number: H01S5/0237 ,  G02B6/12 ,  G02B2006/12121

Abstract: Structures including a photonics chip and a cavity-mounted laser chip, and methods of forming such structures. The structure comprises a photonics chip including a substrate and a cavity in the substrate, a laser chip including a body inside the cavity, a first anchor disposed inside the cavity adjacent to a first corner of the body of the laser chip, and a second anchor disposed inside the cavity adjacent to a second corner of the body of the laser chip. The first and second anchors are configured to attach the laser chip to the photonics chip.

公开(公告)号：US20240304570A1

公开(公告)日：2024-09-12

申请号：US18181123

申请日：2023-03-09

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhuojie Wu

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L23/564 ,  H01L21/56

Abstract: A structure includes an integrated circuit (IC) chip including a substrate. At least two input/output (I/O) openings extend inwardly from an exterior surface of the IC chip. The I/O openings can be used to connect any sort of I/O device, such as an external optical device like a laser. Each I/O opening is separated from an adjacent I/O opening by a wall. An opening extends through the wall to each of the at least two I/O openings, and a moisture barrier is on inner surfaces of each I/O opening and the opening. The opening may reduce stress and may reduce sharp corners in the I/O openings to reduce damage to the moisture barrier.

公开(公告)号：US20240429127A1

公开(公告)日：2024-12-26

申请号：US18340174

申请日：2023-06-23

Applicant: GlobalFoundries U.S. Inc.

Inventor： Dewei Xu ,  Ravi Prakash Srivastava ,  Zhuojie Wu

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/532

Abstract: A structure includes a through semiconductor via (TSV) in a semiconductor substrate. The structure also includes a cavity including a first cavity portion in the semiconductor substrate and surrounding a middle section of the TSV and in direct contact with the TSV. The cavity also includes a plurality of second cavity portions in the semiconductor substrate and surrounding an upper section of the TSV. The semiconductor substrate is between adjacent second cavity portions, creating a bridge portion that provides structural support. The cavity reduces parasitic capacitance.

公开(公告)号：US12158442B2

公开(公告)日：2024-12-03

申请号：US17929404

申请日：2022-09-02

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhuojie Wu

IPC: G01N27/22

Abstract: An integrated circuit (IC) structure includes a moisture barrier about active circuitry. A capacitor is entirely inside the moisture barrier. The capacitor has a breakdown voltage. A moisture detector is configured to apply an increasing voltage ramp to the capacitor up to a maximum voltage less than the breakdown voltage of the capacitor. In response to determining that a current hump exists in a test current-voltage response curve of the capacitor to the increasing voltage ramp, the detector transmits a signal to the active circuitry to indicate a presence of moisture in the IC structure. The moisture detector is accurate and sensitive to moisture ingress, which provides more time for remedial action. The detector is non-destructive and can be used in a final IC product.

公开(公告)号：US20240361545A1

公开(公告)日：2024-10-31

申请号：US18307151

申请日：2023-04-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhuojie Wu ,  Erdem Kaltalioglu

IPC: G02B6/42

CPC classification number: G02B6/4248 ,  H01L23/5283 ,  H01L23/53295 ,  H01L23/564

Abstract: A structure includes an integrated circuit (IC) chip including a substrate. An input/output (I/O) opening extends inwardly from an exterior surface of the IC chip. A metal finger structure protrudes partly into the I/O opening, and outer surfaces of the metal finger structure are covered by a moisture barrier. The metal finger structure may provide stress-relief by removing attacking surfaces for stress in the I/O opening and/or otherwise reduces stress, such as film stresses, to reduce damage to the moisture barrier and improve reliability compared to conventional devices.

公开(公告)号：US20240348005A1

公开(公告)日：2024-10-17

申请号：US18134068

申请日：2023-04-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhuojie Wu ,  Yusheng Bian ,  Koushik Ramachandran

IPC: H01S5/024 ,  G02B6/42 ,  H01S5/02345 ,  H01S5/0236 ,  H01S5/0237 ,  H01S5/183

CPC classification number: H01S5/02469 ,  G02B6/4215 ,  H01S5/02345 ,  H01S5/0236 ,  H01S5/0237 ,  H01S5/18305

Abstract: Structures including a photonics chip and a surface-mounted laser chip, and methods of forming same. The structure comprises a photonics chip including a surface, a laser chip including a light output and a body that are spaced from the surface of the photonics chip, a first adhesive between the body of the laser chip and the surface of the photonics chip, and a second adhesive between the body of the laser chip and the surface of the photonics chip. The light output is oriented toward the surface of the photonics chip, the first adhesive has a first thermal conductivity, the second adhesive has a second thermal conductivity that is less than the first thermal conductivity of the first adhesive, and the second adhesive is disposed in a light path between the light output of the laser chip and the surface of the photonics chip.

公开(公告)号：US20240154384A1

公开(公告)日：2024-05-09

申请号：US17982606

申请日：2022-11-08

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhuojie Wu ,  Koushik Ramachandran ,  Yusheng Bian

IPC: H01S5/0236 ,  H01S5/02251 ,  H01S5/024

CPC classification number: H01S5/0236 ,  H01S5/02251 ,  H01S5/024

Abstract: Structures for a cavity-mounted chip and methods of fabricating a structure for a cavity-mounted chip. The structure comprises a laser chip including a body attached to a substrate. The laser chip has an output, and the body of the laser chip has a bottom surface spaced from the substrate by a gap. The structure further comprises a first adhesive in the first gap and a second adhesive positioned in the first gap between the first adhesive and the output of the laser chip. The first adhesive has a first thermal conductivity, the second adhesive has a second thermal conductivity, and the first thermal conductivity of the first adhesive is greater than the second thermal conductivity of the second adhesive.

公开(公告)号：US12292603B2

公开(公告)日：2025-05-06

申请号：US17933199

申请日：2022-09-19

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhuojie Wu ,  Seungman Choi

IPC: G02B6/42

Abstract: A photonic integrated circuit (PIC) structure includes a substrate, and a cavity defined in the substrate, the cavity including a shoulder at a side of the cavity. A plurality of z-stop supports for an optical device are also included. Each z-stop support of the plurality of z-stop supports is on a support portion of the shoulder. A wire extends over the side of the cavity and between at least two z-stop supports of the plurality of z-stop supports. An optical device is positioned on the plurality of z-stop supports in the cavity and electrically coupled to the wire. Electrical connections between z-stop supports allows larger sized electrical connections to the optical device to mitigate electromigration issues, and increased options for electrical connections.

公开(公告)号：US20240243037A1

公开(公告)日：2024-07-18

申请号：US18154481

申请日：2023-01-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Dewei Xu ,  Zhuojie Wu ,  Daniel Smith

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/481 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/528

Abstract: A structure includes a through semiconductor via (TSV) in a semiconductor substrate, and a dielectric liner surrounding the TSV and between the TSV and the semiconductor substrate. A plurality of discontinuous air gaps is in the semiconductor substrate extending away from the dielectric liner, e.g., radially. The discontinuous air gaps reduce the parasitic coupling capacitance and relieve stress in the semiconductor substrate.

公开(公告)号：US20240094465A1

公开(公告)日：2024-03-21

申请号：US17932868

申请日：2022-09-16

Applicant: GlobalFoundries U.S. Inc.

Inventor： Yusheng Bian ,  Mark D. Levy ,  Siva P. Adusumilli ,  Karen A. Nummy ,  Zhuojie Wu ,  Ramsey Hazbun

IPC: G02B6/122 ,  G02B6/13

CPC classification number: G02B6/1228 ,  G02B6/13

Abstract: The disclosure relates to a PIC structure including a photonic component on a semiconductor substrate. Each of a plurality of optical guard elements are composed of a light absorbing material and are in proximity to the photonic component. The optical guard elements may mimic an outer periphery of at least a portion of the photonic component. The optical guard elements may include at least one of: a germanium body positioned at least partially in a silicon element, a silicon body having a high dopant concentration, and a polysilicon body having a high dopant concentration over the silicon body.